Research On Test Scheduling And Reliability Of NI In NoC

Many researches have focused on the NoC fabric because of its high reliability and scalability. For integrated circuit system, the testing existed during the whole system life cycle of design, verification, manufacture and runtime. The IP cores in NoC communicated with each other through router-based framework. For the testing of IP cores in NoC, it is general to transmit the test data by reusing the NoC communication architecture. However, the testing is easy to lead to the conflict of resources when there are multiple TAMs. In addition, the building of test paths and collection of test responses are implemented in NI in many works. But the research of NI reliability is often ignored. For solving the above problems, the methods we proposed are listed in both concurrent testing and the reliability of NI.(1) In order to solve the confliction of test resources. A link-contention free test method is proposed. Frist, we divided the network into multiple partitions by using the partition algorithm. Then, to find out the connected path between partitions, a link allocation algorithm is proposed. The ultimate goal of this paper is to make all partitions connected, thus removing the resource confliction, reducing the testing time and guaranteeing the reliability for the whole chip. Experiment result shows that the testing time is reduced by 14.13%～52.62% when compared with general cases, and is reduced by 16.42% at most while compared with the existing algorithm. Therefore, this design is a relatively optimal contention-free test scheduling method.(2) For the problems of NI reliability and probably out-of-order of packets, we proposed a high reliable NI design supporting transaction reordering. Firstly, by using double virtual channels (VC) design instead of united buffer, high efficiency and reliability of NI have been achieved. Secondly, a new reorder mechanism has been proposed for solving the out-of-order problem. It employs a link structure to organize the reordering buffer status table. Thus, the NI can reach both an efficient utilization of reordering buffer and a high speed of transaction reordering.