Research And FPGA-based Optimization On Key Technology Of Vision-based Altitude Measurement And Target Recognition For Small Unmanned Aerial Vehicles

The attitude assessment and visual navigation are the two key technologies of the small UAV(Unmanned Aerial Vehicle) system. The key technology research and FPGA-based(Field Programmable Gate Array) optimization of the altitude measurement for the attitude assessment and the target recognition for the visual navigation are presented in this paper.Firstly, the altitude measurement of small UAVs is terrible in low altitude and complex environment, such as urban, interior, because traditional sensor failure or the precision is not accurate. Therefore, many methods of visual altitude measurement are proposed. However, the existing methods of visual altitude measurement are limited to artificial mark, unfortunately. A visual altitude measurement method fit to natural environment, which based on optical flow, is put forward in this paper. It provides a reliable altitude information source for small UAVs? flight attitude assessment.Secondly, in order to meet the demand of denseness, real-time and flexibility of the optical flow estimation, a FPGA-based parameter adjustable parallel structure for pyramid LK(Lucas-Kanade) optical flow estimation is proposed in this paper. Simultaneously, this architecture is scalable. Pyramid LK optical flow is a layer-wised pyramid implementation of LK optical flow, which maintained the good locality and potential parallelism of LK optical flow estimation and at the same time, extended the range of LK optical flow estimation.Thirdly, the visual angel of small UAVs is changing in flight. Therefore, the CDBN(Convolutional Deep Belief Network), a popular deep learning algorithm, which is translation invariant, is used to recognize whether existing buildings in the scene in this paper.Finally, in view of the CDBN?s training time is long, but there is a high potential parallelism. An optimization scheme of CRBM(Convolutional Restricted Boltzmann Machine), the core unit of CDBN, is designed under the custom hardware architecture of FPGA in this paper.