Design And Implementation Of Weak Signal Acquisition Baseband Architecture For Beidou-2

China’s Beidou navigation system has stepped into the stage of rapid development since its completion in 2003 and successful operations later on. Today most of the Beidou receiver takes a low capture sensitivity and long Time To First Fix, whose capture ability is much less than GPS receiver. So this thesis puts forward a new Beidou capture architecture, promoting the capture sensitivity of the receiver and reducing its capture TTFF.In this thesis,we focused on the three-level capture architecture based on coherent full bits algorithm. First of all, we researched the advantages and disadvantages of the existing various kinds of fast capture algorithm and Identified the research route based on the partial-matched filter and the full bit correlator. Secondly, we design the full bits coherent algorithm matching Beidou system in view of Beidou signal feature. And analyze the gain and loss of the algorithm theoretically. Besides, we give the frequency classification merge method to solve the problem of large quantity of the frequency search unit which reduces the subsequent hardware cost and can meet the demand of receiver application. Meanwhile we use Matlab to the simulation of algorithm, the results are consistent with theoretical calculation. Finally, the capture algorithm based on coherent full bits proposed by this thesis will be written by using Verilog code. This thesis improve subsequent design of part matched filter RAM and designs NH-RAM and coherent RAM for full bits coherent detector. And through comparing the NH phase to select NH code phase which greatly reduced the cost of RAM and system power consumption. Under the combination of digital frequency conversion, and other core modules, constitute a complete capture engine.This thesis has carried the function and performance test on capture engine based on VCS verification and FPGA verification environment. Functional tests show that capture engine can be get Beidou satellite signal under the 16.368 MHz system clock.Performance test showed that capture engine whose power from -128dBm to -145dBm can capture correctly the actual satellite signal. We get capture baseband detection probability and false alarm rate by montecarlo analysis, the overall catch performance reached domestic advanced level.