Design Of Mixed-signal Equalizer On 60GHz Millimeter-Wave Communication System

In the 60 GHz band, due to its unique propagation characteristics, with 5-7GHz unlicensed spectrum resources to achieve as high as a few Gbps transmission rate and makes the 60 GHz wireless communication technology more attractive in the realization of the application of short distance wireless Gigabit communication. And with the development of CMOS technology, highly integrated design also make the rate increasingly high, the scale is becoming smaller, the cost is getting lower. Therefore, 60 GHz wireless communication technology is considered to be the most one of the potential of the technology in the next generation wireless communication.Although having a wide bandwidth and a higher carrier frequency, the design of 60 GHz is similar to the low frequency, which processes the signal in the digital domain, requiring higher levels of circuit and more complex signal processing techniques. And it also makes today’s commercial 60 GHz power consumption up to 1W at base-band, seriously restricting its application of mobile/hand-held devices in the future. In order to reduce the complexity of the signal processing and power consumption, this paper mainly studies the mixed-signal equalization technique applied to 60 GHz communication system, designs and implements the feed-forward equalizer in the analog domain. The paper main work is as follows:1. In 60 GHz communication system, the mixed-signal equalization technology is researched. Firstly, the paper studies the structure of mixed-signal equalizer, mainly by judgments in the analog domain feed-forward equalizer(FFE) and digital domain feedback equalizer(DFE) to achieve, and studied the principle and advantage of their respective equilibrium. Then, at the implementation of the mixed-signal equalizer, the number of taps of FFE and DFE have been weighed, namely, the number of taps be determined by constantly optimizing the relationship between the BER performance and power consumption.2. In order to achieve the circuit structure of FFE, the paper researches and comprehensive analyzes of the circuit implementation structure of the existing mixed-signal equalizer, mainly based on CMOS current model logic(CML) circuit technology to achieve. Therefore the research analyzes the advantages of CMOS CML circuit technology to achieve mixed-signal equalizer. And based on CMOS CML circuit topology, focused on the structure of various parts of FFE, the paper introduces the circuits’ structure and functions, including variable gain amplifier(VGA), adder and delay circuit.3. Due to the fractional spaced equalizer is not sensitive to sampling timing deviation, the fractional spaced equalizer is used to design the analog delay line of FFE. Then based on CMOS CML circuit technology, design analog delay line, a multiplier and adder’s circuit structure, simulate its various modules, and test it on 60 GHz communication system platform. The result show that: the FFE module achieves a certain equilibrium effect.