Multi-standard Wireless Mobile Communication System Base Station Information Decoding Hardware Acceleration Module

The second generation of mobile communication is(GSM) with no electricity-based introduction of encryption technology greatly enhances security, error detection and correction also improves the quality of communication. GSM 2G network retains the most practical technology, but has a much broader application of the fourth generation mobile communication defined(4G) core technology mainly refers to the use OFDM(Orthogonal Frequency Division Multiplexing) modulation techniques OFDMA multiple access technology. Divided LTE FDD-LTE and TD-LTE both cases, FDD-LTE is a frequency division multiplexing technique based on LTE, TD-LTE and TD-SCDMA is evolved, is time division multiplexing-based LTE technology. With the development of LTE technology, the speed of the Internet has been a few times faster than GSM.The main letter pseudo base stations using mobile mapping system to monitor some useful information for each order process to obtain the user’s mobile phone during the shift information. Pseudo GSM base station sends out a signal, the carrier signal and user isolation, allowing the user to leave the station before re-select the other base stations. Therefore, base station monitoring information to some extent, is of great significance.This paper is to study the multi-standard wireless mobile communication base station identification system for hardware acceleration module, mainly for the GSM FCCH channel monitoring acceleration and LTE accelerate the entire synchronization process.In the GSM network system, DSP-based GSM base station information decoding system, which contains the FCCH and SCH channel detection, channel estimation and filtering, the solution GMSK modulation, de-interleaving and solutions Viterbi final basic information about the GSM base station reads. The entire DSP-based decoding system only after a comprehensive analysis, decided to channel FCCH detecting acceleration, the FCCH in the most time-consuming FIR filters, FFT transform and power peak detector placed in the FPGA to do. DSP and FPGA intermediate data transfer via EMIF interface for data exchange.In the FDD-LTE system, the synchronization signal reception down after an in-depth study. In MATLAB on a primary synchronization signal and a secondary synchronization signal PSS SSS detection simulation, and operation of the entire synchronization module. After the simulation is complete, the FDD-LTE system synchronization module FPGA to achieve, using verilog prepared entire synchronization system module. Wherein the synchronization module includes a down-sampling module, PSS correlation calculation module, frequency offset estimation module and positioning module SSS and XILINX ML605 development board hardware testing, and ultimately get the header cell ID location and the value of the signal.After acceleration, it can be more rapidly read out information of the base. Suppression of pseudo base stations of great significance to ensure the safety and stability of the communication system.