Study On Variable Bandwidth Technology And Its Implementation

With the broadband radar signals widely using in electronic war, a reconnaissance receiver must have the ability to receive broadband signals and narrowband signals in the mean time in order to meet the new challenges. A reconnaissance receiver based on Variable Bandwidth Receiving technology is able to receive the signals with different frequency and bandwidth, providing complete signal spectrums for subsequent signal processors. For the reason, Variable Bandwidth Receiving technology can improve the performance of the entire system of radar reconnaissance. Therefore Variable Bandwidth Receiving technology is not only an effective way to enhance the reconnaissance capabilities of receivers, but also a key mean of improving the performance of signal processing. Supported by some relevant projects, this thesis contributes to the research of Variable Bandwidth Receiving technology and the method of implementing Adjacent Channel Merging(ACM) technology in FPGA.The main points of this thesis are as follows:1. One of a typical Variable Bandwidth Receiving technology--Serial Multi-level Channelization is analyzed. For the reason that the performance of Serial Multi-level Channelization heavily depends on whether the first level channelization could receive complete signals or not, Parallel Multi-level Channelization is studied and improved. Due to this structure, the aforesaid problem could be solved and the processing delay could be shorten.2. Due to the fact that Parallel Multi-level Channelization is in the form of fixed, DDC based on tunable frequency conversion is proposed. In this processing mode, signals are down-converted to baseband by applying carrier frequencies of the non-integer fundamental frequency. The fact that a narrowband signal crosses several channels can be avoid.3.If Digital Down Converter(DDC) based on tunable frequency conversion is applied to hardware implementation, it’s difficult to calculate the filter coefficients in real time. Aiming at above shortcoming, based on the ACM technique, the sufficient conditions of avoiding the problem of trapped wave are derived and proved. Besides, the design methods of low pass prototype filter are improved. According to the simulation results, the fact that ACM could receive variable bandwidth signals is verified. Meanwhile, ACM avoids the difficulty in calculating the filter coefficients in real time.4. Hardware platform of reconnaissance receiver based on FPGAs and DSPs is completed. The ACM technology is realized by coding Verilog. Through debugging the function of the hardware and analyzing the results of tests, the feasibility of the Adjacent Channel Merging is verified.