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GPU-based Cryptanalysis Technology And Hardware-based S-box

Posted on:2017-03-30Degree:MasterType:Thesis
Country:ChinaCandidate:L YuanFull Text:PDF
GTID:2308330485982046Subject:Information security
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This paper studies two aspects, one is about the acceleration effect of CUDA in crypt analysis, and the other one is about the configuration of smaller hardware area S-box by using composite field technology.CUDA is a GPU’s parallel computing platform and programming model released by NVIDIA in November 2006 [1]. It exploits the parallel computing capability of GPU, develops the computation processes which are suitable for runing on GPU. Using CUDA programming can greatly accelerate the speed of the cryptographic algorithm, and also can be used to optimize some crypt-analysis technology. According to the computing characteristics of the GPU, we can study what kind of cryptographic algorithm can be used by CUDA acceleration, which cryptanalysis method using CUDA can have higher effi-ciency. This paper identifies the CUDA optimization techniques applied to a block cipher SPECK [2]. SPECK cipher designed by the US National Security Agency (NSA) is a lightweight block cipher with Feistel structure, specifically for software environments implementation. In particular, the authors imple-mented their algorithms on the an 8-bit micro-controller, Atmel ATmega128 with clock speeds are 16 MHz, the encryption throughput can reach 888Kbp-s. In this paper, the throughput of encrypting the SPECK block cipher with 64-bits block size and 96-bits key size can reach 2.98Gbps by using CUDA on Tesla C2070 GPU. While taking advantage of CUDA we can also look for the balance nature of cryptographic algorithm, we do the experiments on SPECK, the speed in Tesla C2070 GPU can reach 147 times than the speed in Inter(R)Xeon(R) CPU E5-2620@2.00GHz CPU. This result shows that the CUDA can play a good role in accelerating the cryptographic algorithm and cryptanalysis methods that meet some suitable characteristics.On the hardware implementation of AES [3], we can reduce hardware resource consumption through the composite field implementation of the Sub-Bytes. S-box is constructed from an affine transformation and a multiplicative inversion in GF(28). Composite field arithmetic is through a isomorphic map-ping and isomorphic inverse mapping, the multiplicative inversion in the finite field GF(28) is converted to the composite field GF((24)2) or GF(((22)2)2). On the point from hardware implementation, using the composite field arithmetic, according to the structure of the SubBytes, construct a new S-box with a small-er hardware area than AES S-box. We construct a new S-box constituted by one multiplicative inversion on composite field arithmetic and two affine trans-formations. The paper consider the relationship between affine transformation and the multiplicative inversion in composite field. The affine transformation we choose clever can reduce the hardware area of the multiplicative inversion in composite field of the S-box and InvS-box, and then further reduce the total area of hardware implementation.we also found the new S-boxes have equivalent reliable security by analyzing its cryptography security properties.
Keywords/Search Tags:CUDA, SPECK, S-box of AES, Hardware Implement, Com- posite Field
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