Research And Design Of An AVS Circut Based On Flexible Critical Path Fitting Of Loads

Along with the rapid development of the semiconductor industry, the integration of the chip becomes more and more high, leading the power consumption becomes more and more outstanding. At the same time, the rapid development of a variety of portable equipment is also a high demand for the product’s endurance. Unfortunately, battery technology has not kept pace with the development of circuit technology, so it is imminent to design high efficient power management scheme. Adaptive Voltage Scaling is a new power management technology in recent years, because of its real-time closed-loop voltage regulation mode, so that the energy consumption of the load chip is greatly reduced.In this thesis, we first analyze the power source of the digital circuit, and the effective method of reducing the energy consumption of the load chip is described.. And then this thesis introduces the current popular power management technology, including DPM strategy, DVS technology, AVS technology, and describes the advantages of AVS technology relative to the other two kinds of power management technology. In the different implementation methods of AVS technology, AVS based on the critical path replica has small hardware overhead and high accuracy of regulation, is an ideal method of AVS technology.As the line width decreases, the delay of interconnect becomes more and more important, and the traditional critical path replica only takes into account the delay of logic gates, which reduces the accuracy of the fitting. Traditional critical path replica only considers critical path of the whole load, which is the longest delay path, that makes power supply voltage is still calculated by the most complex task when the load operates simple task. So the energy saving effect of simple task is reduced. This thesis aimed at the two problems, and made some improvement and innovation. The interconnect delay and gate delay are fitted separately, which has improved the precision of fitting. To separate the critical paths of different load tasks, the energy saving effect of the load is improved.In this thesis, the design of the circuit using the Buck converter as a power level,the control mode is voltage control, the modulation mode is PWM, the operatingfrequency of the Buck converter is 2MHz, whose loop compensation is proportional differential compensation. The input voltage of the Buck converter is 3.3V, and the output voltage can range from 0.7V to 1.8V, voltage regulating step of the Buck converter is 25 mV. The digital load is an operator which can operate sixteen bit input addition, multiplication, and multiply accumulate, and working frequency of the load is30MHz-100 MHz. After the detailed exposition of the principle of circuit design and the way of working, the thesis introduces some key modules including delay detection,voltage regulation algorithm and main control logic.etc. At the end of thesis, the feasibility of the designed AVS circuit is verified by the circuit simulation. When the working tasks or working frequency of the load changes, Buck converter can regulate the output voltage to the minimum under the premise of the load works correctly.