A Method For Implementing IEEE 1588 With The 1000M Ethernet Interface

Nowadays, with the rapid development of network technology, Ethernet has been widely applied to the test field for its universal protocols, long-distance transmiss io n, flexible network topologies and growing network bandwidth. Networked measurement systems that mainly for distributed test systems need to address the realtime control and data reliability concerns compare to the common Etherne t applications. IEEE 1588(IEEE Standard for a Precision Clock Synchroniza t io n Protocol) has been widely adopted by networked measurement and control systems. However, as the increasing demand for both of the scalability and the complexity of test tasks, the 100 M Ethernet Interface intrinsically induces limitation for the transmission of the test data. That plight can be eliminated by the 1000 M Etherne t Interface, which has been already been the defining feature of the future networked test equipment. Thus, the implementation of IEEE 1588 that is compatible for the 1000 M Ethernet Interface is imperative for the test system.First of al, This paper summarizes popular PTP(Precision Time Protocol) hardware support methods and then a Depth analysis is made for three PTP hardware support schemes based on Xilinx Zynq-7000 SOC. A scheme that designing IEEE 1588 support IP core in PL is chosen to realize IEEE 1588 on this hardware platfor m.In order to realize the Ethernet data transmission path, this scheme design Gigabit Ethernet PHY hardware with FMC Interface and IP core which realizes data rate selection and signal optimization. A test project based on Lw IP is designed to detect the communication link between PHY and PS(Processing System).To achieve the synchronization accuracy of sub-microsecond, the configur ab le real-time clock and the time stamp module were realized in the programmable logic which makes the PHY and MAC to be free of time stamp functions in the communication link.PTPd(Precision Time Protocol deamon, an open source implementation) was modified and transplanted into the embedded Linux system to realize PTP state machine while IEEE 1588 IP core device driver was developed to provide the application layer with the access to the accurate time-stamp obtained in link layer by IEEE 1588 IP core.This project structure makes the transplantation process concentrates on time adjustment algorithm design in the application layer regard le ss of obtaining precise time stamp in hardware.The synchronization accuracy test of this proposed method is evaluated by outputting PPS(Pulse Per Second) which can verify the synchronization accuracy of all nodes(master and slaves) in the network. The experiment is divided into functio na l testing and usability testing. After quantifying the accuracy and stability of the synchronization offset, we concluded that clock frequency offset, the number of the slave clocks, the number of switch link and network transmission delay are the main influence factors for synchronization and proved the feasibility of maintai ni ng submicrosecond- level synchronization accuracy within multi- level switches topology and proper network traffic.