Time Domain Model And Current Limiting Strategy For LLC Resonant Converter

High efficiency high power density DC-DC converter is the crucial component of power converting equipment for electric vehicle battery charger, distributed photovoltaic system and data center power system. LLC resonant converter could achieve the zero voltage switching of primary main switches and zero current switching of rectifiers in entire operating load range at high switching frequency, which makes it a favorable topology for these applications. However, the multi resonant character and nonlinearity of LLC converter increase the difficulties in accurate modeling and analysis, and also bring challenges in converter control and performance improvement.There's great current shock in resonant tank of LLC converter under start-up, load stepping, over load and output shorted condition, which may cause damage to main switches or trigger over current protection spuriously. The widely used open loop current limiting method with frequency modulation or pulse width modulation receives poor shape control of the resonant current during start-up and great ripple of output voltage under over load condition. Besides, an useful and simple design method of current limiting parameters is lacked. The close loop current limiting method can realize flexible control effect with higher cost for extra sensing of output current or resonant current.This paper focus on the large signal modeling of LLC converter, open loop and close loop current limiting control technique. Firstly, the basic operating modes and different working patterns under different switching frequency and load condition are analyzed, then the state equations of each operating mode and state trajectories of different working patterns on state plane are derived. The transition criteria between different working patterns is deduced and the duration of time of each operating mode is solved, based on state plane analysis. The increment of output voltage and peak value of resonant current during half a switching period are also obtained. Finally the time domain model of LLC converter is established based on iterative calculation of operating modes, which could be used to analyze the dynamic process of the concerned circuit state variables. Compared to circuit emulation model, the time domain model could save plenty of calculation time while guaranteeing sufficient accuracy for analysis.For the issue of designing the starting frequency and frequency time constant of open loop current limiting method, this paper analyzes the relation between starting frequency and resonant current overshoot value and convergency value at start-up, and proposes an initial driving pulses width optimization method to drive the resonant current into convergence rapidly without overshoot, which relieves the demand on starting frequency to restrict current spike. An split resonant capacitor structure for LLC resonant converter is adopted with driving pulses optimization to adapt to situation with relatively lower current limiting value, saving the number of transition pulses and simplifying the design of the pulses width. Besides, the maximum value of resonant current during open loop start-up is obtained based on the time domain model of LLC converter and the optimal frequency time constant is calculated using iteration algorithm, which satisfies the restrict of current limiting value and guarantees the response speed of output voltage additionally.For the issue of extra cost of current sensing of close loop current limiting method, this paper analyzes the relation between resonant current, output voltage and switching frequency, considering the effect of magnetizing current. Then an close loop current limiting control strategy without current sensing is proposed, which modulates the switching frequency based on the output voltage and achieves constant peak value of resonant current during start-up, load stepping and over load condition. The design method of current limiting parameters are provided, and the maximum available value of output voltage under over load condition and settle time of output voltage during start-up are analyzed.