| Battery management system is the critical part of battery-powered system, as well as the core device to improve battery performance and extend battery life. Battery management system requires high-precision, low offset, low power consumption Analog to Digital Converter(ADC). Because of oversampling and noise shaping technology, Sigma-Delta ADC can achieve high precision without the restriction of device matching. Incremental Sigma-Delta ADC, as a class of oversampling Sigma-Delta ADC, has low input signal frequency or even direct DC input. It is suitable for battery management system.This paper researched the theory of incremental Sigma-Delta ADC and deduced the expression of quantization error. This paper discussed the improved method of the structure, including the use of higher order modulator and extended counting technique. This paper designed a second order feed-forward incremental Sigma-Delta ADC which is suitable for power management system. But this ADC has a low conversion speed witch needs to be improved by extended counting. The ADC which measures quantization error can use the same circuit as the Sigma-Delta ADC. By combining hardware reuse and extended counting technique, the cycles that ADC needs can be reduced, a better trade off can be made between the area and speed.Based on this design, an extended counting Sigma-Delta ADC with hardware reuse technique is proposed. The proposed ADC structure is a second-order Sigma-Delta modulator, using the extended counting technique. The output is based on the combination of an incremental conversion for the most significant part of the result and on a cyclic conversion for the least significant part. While maintaining low requirement of component matching, the conversion rate has been improved. The device achieves 88.5dB SNDR, 93.6 dB SFDR and 14.4 b ENOB. T he ADC is fabricated in 0.5 ?m CMOS and has a conversion rate of 50 k S/s with oversampling ratio of 22. It consumes 2.41 mW from a 5V supply. |
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