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Design Of The Dual Phase Interleaved Buck DC-DC Chip With The Function Of Digital Calibration

Posted on:2016-07-18Degree:MasterType:Thesis
Country:ChinaCandidate:Y W QiFull Text:PDF
GTID:2322330488474032Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of integrated circuit technology and the wide application of portable electronic devices, the demand of the power management devices in the electronic market becomes increasingly high. The switching power supply is in favor of the power management chip with the advantage of its high efficiency, small volume and less peripheral. While traditional switching power supply still exists defects such as insufficient load ability and inaccuracy output voltage with large ripple. So the research of switching power supply equipped with low power, small ripple, large load and high accuracy is imperative.In this paper a dual phase Buck DC-DC converter with the function of digital calibration is proposed on the basis of working principle of the buck DC-DC. With the characteristics of fast transient response of large load, easy to compensation and calibrated output voltage, the chip designed in this paper adopts the continuous working mode and the peak current control mode PWM modulation method. This paper raises the external digital calibration function on the basis of the working principle and various modes of steady state analysis of buck DC-DC converter and has carried the detailed theoretical analysis on it. By convection after the chip simulation validation, it can meet within ±15% amplitude correction of the output voltage, reduce the output error caused by the inaccurate reference voltage or output line loss and get accurate output voltage. At the same time the paper introduces the phase-locked loop technology that can be used for synchronization and bipolar parallel technology in detail which is based on the application dual phase and the general assembly load. The PLL technology, which can make the internal clock and external clock synchronization, can capture the 100 k Hz~1MHz wide locking range and meet the duplex clock synchronization and 180 degree phase difference of two chips parallel applications. In order to realize small inductor current ripple and output voltage ripple the multi-master mode and single-master mode are designed for the plurality of chips on load flow in parallel chips. It also solves the compromise of small input and output capacitor and stability in dual phase 12 A load application.This paper first introduces the background and significance of the research, with a brief overview of the various types of switching power supply, and analyzes the topology structure and working principle of the buck DC-DC converter. At the same time steady characteristics of the DCM and CCM working mode and the modulation method of the system have been carried on the comparison and described in detail. Then the paper focuses on the function of digital calibration, PLL technique and dual phase parallel technology. Finally in this paper choice of the peripheral devices, overall functionality and the stability of the chip are analyzed. And a brief analysis of the chip design and principle of the module are given with the band gap voltage reference module, current sense module and PWM comparator module as examples. At the same time the paper introduces some notices in the process of landscape design.The chip this paper proposed uses 0.35μm BCD process, and simulates the single, the function of the digital calibration and dual phase parallel with the Spectre simulator on the basic of Cadence software platform under different temperature and different corners. The simulation and results show that the chip can realize the output voltage digital calibration and bipolar parallel applications.
Keywords/Search Tags:Buck, Digital calibration, Phase-locked loop, Dual phase parallel
PDF Full Text Request
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