Analysis And Research Of Limit Cycle Oscillation In PID Digitally Controlled DC-DC Buck Converter

Electronic products, such as cellphone, computer, camera and so on, are widely used in nowadays, which promotes the rapid development of power system. While digital controlled power system, having distinguished advantages over analog control, attracts more and more attention. As the Analog-Digital Converter (ADC) and Digital Pulse Width Modulator (DPWM) have quantization effect, which may induce limit cycle oscillation (LCO) in the digital controlled power system, the steady state and transient performance of the system may be disturbed by it.This thesis focuses on the analysis of PID digitally controlled DC-DC buck converter. Firstly, the state space averaging method is used to model the DC-DC buck converter, the equilibrium of the system is derived and the reason why the system has LCO is proposed. Secondly, the specific situation of LCO in the system and the PID's effect on it are discussed, under the condition of the bits of DPWM are equal to, one bit higher or two bits higher than that of ADC, deducing the amplitude and period of the LCO and the corresponding requirement on PID parameters. Finally, the Simulink simulation and FPGA verification of the system are implemented.This thesis finds out that the higher the resolution of DPWM is, compared with that of ADC, the fewer LCO of the system may have. Furthermore, increasing Kp is helpful to the stability of the system, while the system may have more duty cycles of LCO or even become divergent if Ki increases. Fortunately, if the resolution of DPWM is 2 bits higher than that of ADC and the parameter of Kp is relatively high Ki is relatively low, the LCO will disappear in the system, which is of great importance to the design of PID controller in the DC-DC buck converter and a perfect guidance to the design of other digital controllers.