Design And Research Of High Efficiency DC/DC Digital Power Based On FPGA

At present,electronic equipment imposes stringent requirements on the power supply performance,and conventional switching power supplies with the disadvantages of a single circuit structure and with a complex control method.the reliability and stability of the system can be improved by digital control technology.which can achieve flexible control algorithms,and easy to detect and maintain,at the same time has portability.For this reason,a digital switching power supply be designed by this article based on FPGA control.Based on the in-depth study of digital power theory and key technologies,a BUCK DC/DC converter based on FPGA control is designed for application requirements.Firstly,the overall architecture of the power level main topology combined with a digital controller is designed,which includes a power main circuit,a drive circuit,an ADC analog-to-digital conversion circuit,a PID compensator,and a novel digital pulse width modulator module.In the system power level part:Analyze the DC/DC converter working mechanism and establish the main topology mathematical model through the state space average method,and obtain the main circuit transmission function,which lay the foundation for the system digital controller design;system drive circuit is designed based on IR2117 chip,which complete Analog and digital interface circuits;passive lossless snubber circuits are used to implement soft-switching resonant techniques.In the system control stage part,the AD9280 chip is used to complete the analog-to-digital conversion circuit design;the analog PID compensator is designed based on the main topology transfer function,and the system transfer function is compensated through the MATLAB toolbox?SISO?.The system simulation compensation function is obtained.The mathematical discrete method is used to derive the discrete transfer function of the system.The PID digital compensation algorithm is realized on the FPGA through a lookup table.Finally,a new type of DPWM is designed by using the count comparison and delay loop mixing combined with the digital dithering method.The loop characteristics and stability of the PID compensator are verified in the MATLAB environment.The open-loop transfer function crossover frequency of the BODE chart display system reached 60kHz,and the dynamic performance of the system was improved;the phase margin reached 65 degrees,which is approximately 40 degrees higher than the system that do not compensate,the system's steady state performance is optimized.In the Modelsim environment,the ADC analog-to-digital converter,digital PID compensator and digital PWM are simulated respectively,and the expected simulation results are obtained.The simulation performance of the system is simulated using digital simulation.The simulation results show that the system has good correction capability.When the input parameters change,the duty cycle signal can respond quickly according to the compensation algorithm,so that the output parameters remain stable.Finally,the system output performance is simulated in the Simulink environment.The simulation results shows that the transient and steady-state performance of the system is good,the system rise time is about0.2?10^-4s,the overshoot is 15%,the overall efficiency is 93.02%,and the ripple ratio is 1.1%.The system can output stable parameters,and the output parameters can return to stable state after a brief oscillation in the case of sudden load changes.The simulation results of the module and the system all show that the design theory is correct,the control strategy is feasible,and the overall system performance index meets the design requirements.