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Research On DCM Boost PFC Technology Based On Staggered Parallel Topology

Posted on:2018-05-10Degree:MasterType:Thesis
Country:ChinaCandidate:G B YaoFull Text:PDF
GTID:2322330515460070Subject:Instrumentation engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of power electronics technology,power electronic products penetrate into all areas of life,they produce higher harmonics on the power grid pollution is also increasingly serious,so that people pay more and more attention to harmonic pollution control.Power factor correction(PFC)can effectively reduce the harmonic pollution,improve the quality of the power grid,improve the utilization of electricity,power electronic products is to solve one of the main means of harmonics.The traditional single ?branch Boost PFC circuit topology of the input current ripple and switching losses are large,generally used in medium and low power applications.Therefore,this paper has improved the Boost topology,introduced the staggered parallel Boost PFC as the main circuit topology,and based on ATmegal6 controller on the converter for digital control.Based on the Boost topology,this paper analyzes the basic principle of power factor correction technology,discusses its three working modes and control methods.Based on this,the working process and inductance and capacitive ripple characteristics of staggered parallel Boost PFC topology are introduced,and the constant conduction time control method of staggered parallel Boost PFC topology is analyzed emphatically.Compared with the traditional simulation control strategy,the digital control strategy has the advantages of fast processing,flexibility,precision and higher reliability.In this paper,the ATmega16 microcontroller is used to digitally control the PFC converter.The double closed-loop control algorithm is used to ensure the stability of the output voltage,and the input current tracks the phase of the input voltage.Finally,the staggered parallel Boost PFC circuit simulation platform is built based on the Saber simulation environment,and the PFC converter is simulated under different PWM duty cycle,different inductance and different load conditions.On the basis of the simulation results,the design of a rated output power of 500W,the input for the AC voltage 220V/50Hz,the output is constant voltage DC 400V PFC converter,power factor control in 0.95 or more.The results of the prototype test show that the staggered parallel Boost PFC converter is designed to be stable,the output voltage is stable,the power factor is high and the power factor correction is significant.
Keywords/Search Tags:Boost, Power Factor Correction, Interleaving, Digital Control
PDF Full Text Request
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