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BOOST PFC Structure And Algorithm Implementation Under The DSP Control

Posted on:2018-09-05Degree:MasterType:Thesis
Country:ChinaCandidate:W TanFull Text:PDF
GTID:2322330518984923Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
Current harmonic pollution has seriously endangers the safe and effective operation of Power grid and electric equipment,arises at the historic moment of Power Factor Correction technology(Power Factor Correction,PFC)for the problem of harmonic pollution provides a effective way to solve.Modern power technology is moving toward miniaturization,intelligent,integrated power density,green environmental protection direction.in the large-scale power applications,the traditional single-channel Boost PFC technology has been unable to meet the requirements of the power factor correction.So in the Boost PFC converter interleaving parallel technology is introduced,in order to gain higher power density,less switch loss and current ripple,lower switching current stress requirements and better effect of EMI.In This paper,Comparing a variety of PFC topologies,Based on the traditional Boost PFC technology,the basic principle of the Interleaving parallel active power factor correction technique is analyzed,and the design of Power circuit of the Interleaving parallel Boost PFC converter and its control algorithm are introduced in detail.The design of the main parameters of the converter,the design of control circuit,the input current,input and output voltage sampling scheme and software algorithm are Systematically analyzed.According to average current control strategy of Interleaving parallel Boost PFC,introducing the state space average method to establish a small signal model,and based on MATLAB/tool Sisotool tool,PID compensation and correction of voltage loop and current loop are carried out to ensure the stability of the control system.Based on MATLAB/Simulink to build CCM mode of Interleaving parallel Boost PFC system simulation model,simulation results verify the accuracy of system parameters and the control algorithm.Based on DSP TMS320F2812 processor resources characteristics of system software and hardware circuit design,has realized the timing of input and output voltage and current sampling and the constant frequency of power switch variable pulse width control.Are considered in the traditional control switch shock impact on current sampling,puts forward the edge of the uncertain time delay inductance alternating current sampling of the average current sampling algorithm,considering the impact current influence to join the soft start system mechanism,circuit protection mechanism and a series of optimization control,perfect the Interleaving parallel Boost PFC converter static and dynamic performance of the system.Finally,based on the theoretical analysis,an experimental prototype of the average current CCM mode dual-channel Interleaving parallel Boost PFC converter with outputvoltage 400 V,power 300 W and single switching frequency of 150 KHz is fabricated by DSP TMS320F2812.The experimental results are analyzed Validated the correctness of the theoretical design.
Keywords/Search Tags:power factor correction, Interleaving parallel, average current sampling
PDF Full Text Request
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