Design And Relization Of The High-Speed Data Acquisition System For MALDI-TOF-MS

Biosafety refers to biological Vector caused direct or potential threats for human,animals or plants through direct infection or damage environment indirectly.Through the study found that most of the vector is caused by micro-organisms.Due to the wide variety of microorganisms and the occurrence of mutations,it is necessary to quickly determine the types and sources of micro-organisms and take effective measures to suppress the spread and development of the vector in the face of sudden biosafety events.So safe,reliable,fast and accurate microbiological detection technology is one of the key issues to be solved in the field of biosafety.Traditional microbiological detection technology has the characteristics of easy pollution,long cycle and low sensitivity.Compared with traditional biological detection technology,the foreign biology MS analysis technique based on microbial expression spectrum has the advantages of rapid and accurate identification,classification,traceability and monitoring of microorganisms,it provides a strong analyzing method for biosafety and other fields,but the foreign blocked the core technology for our country,so it is an important issue in the field of biosafety to exploit innovative biology detecting device and technology system with core and independent intellectual right.This paper is an important part of the National Major Scientific Instrument and Equipment Specialization which aims to the development and application of the Biosafety specific MALDI-TOF-MS(2012YQ180117)".MALDI-TOF-MS is a new type of soft ionization biology mass spectrometry developing in recent years and has characteristics of high sensitivity,high accuracy and high resolution.MALDI-TOF-MS includes sampling system,matrix-assisted laser-resolved ion source,time-of-flight mass analyzer and ion beam high-speed acquisition.The ion beam high-speed acquisition includes ion detector and high-speed data acquisition system.The ion pulse signal from detector is acquisited,processed and transmitted by high-speed data acquisition system.It is a key point to measure the weak ion pulse signal correctly,which include weak signal conditioning circuit,high-speed ADC data acquisition,data storage,data transmission and analysis.In order to improve the measurement accuracy of ion pulse signal,the paper used FPGA as the master chip,used oversampling technology to improve the SNR,so ADC sampling frequency is set to 2GHz,and ADC resolution set to 12 bit,and extended the storage and high-speed transmission interface,to realize high-precision measurement of ion pulse signal.The specific research contents of the paper includes:1.Project design of the high speed data acquisition system.In order to meet the requirements of ion pulse signal detection in MALDI-TOF-MS,determing the hardware circuit constitution of high-speed data acquisition system firstly.The hardware circuit includes FPGA main control circuit,signal conditioning circuit,ADC sampling circuit,DDR2 SDRAM memory circuit,Gigabit Ethernet circuit,ADC clock circuit and the required power circuit.The FPGA main control circuit realizes the logic control of the whole high speed data acquisition system.The signal conditioning circuit mainly convert the current signal to voltage signal,amplify the weak signal that maximum amplitude of 10 m A ion pulse signal which from MALDI-TOF-MS detector.And in order to match input mode of ADC,converting single-ended output signal to differential output signal.High speed ADC module acquisit the signal,and convert ion pulse signal to digital signal.DDR2 SDRAM memory circuit realize the cache of the sampling data.In order to improve the SNR of the measured ion pulse signal,it is necessary to sample the ion pulses many times,add the sampling data together and dispose.If FPGA has not enough memory space,the DDR2 SDRAM is used to cache the data.Gigabit Ethernet circuit achieve the data exchange with the PC at rate of 1000Mbps;ADC clock circuit provide the ADC chip required high frequency,high precision sampling clock;power module is mainly to provide the required power for the high-speed data acquisition system.2.Hardware circuit frame design based on the high-speed data acquisition system.According to the parameters such as ion pulse width,measurement accuracy,maximum mass number and stacking times,determing the sampling frequency of the high-speed data acquisition system is 2Gsps,the conversion precision is 12 bit,the signal bandwidth is within 400 MHz,and the storage capacity is 512 MB,transmit data by Gigabit Ethernet.In order to improve the accuracy of the sampling clock frequency,produce 1GHz differential clock by PLL chip.In order to meet the ADC full-scale output signal,the paper selected a low-noise and ultra-low distortion operational amplifier AD8099,and high-bandwidth differential amplifier.To ensure high-speed signal integrity,the following specific measures have been taken:(1)For high-frequency analog and digital signal transmission lines,using differential method to reduce noise effectively and improve anti-jamming capability.(2)In the design of circuit board,using eight layers board which are top layer,ground layers,signal layer,power layer,ground layer,signal layer,power layer,bottom layer,making signal layer close to power layer to ensure signal return path has minimum impedence.(3)The AD module uses 100 ohms differential resistor to match impedence,and reduce signal reflection.(4)Power layer,ground layer and signal layer wiring in the same direction to reduce noise jamming.(5)DDR2 SDRAM module uses snake-shaped line to keep the signal line lengths Consistent,to meet signal timing requirements.(6)Distance between signal lines should follow the 3W principle to reduce the signal crosstalk.(7)Top layer and bottom layer was floored,making faraday cage for board,to reduce electromagnetic interference.Through the above measures,ensuring the signal integrity effectively.3.FPGA logic design includes ADC clock module control logic,ADC high-speed output data interface logic,DDR2 SDRAM controller and its control logic,Gigabit Ethernet chip control logic.ADC clock module control logic use FPGA.chip to.control PLL chip generate 1GHz clock as sampling clock of ADC chip by SPI interface.ADC high-speed data output interface is a FIFO which input port are 48 bit,output port are 32 bit in the FPGA chip.DDR2 SDRAM controller and its control logic mainly control DDR2 SDRAM Controller with Uniphy IP core,to achieve DDR2 SDRAM read and write operations.Gigabit Ethernet control logic mainly compile UDP protocol to achieve data transmission.through the GMII interface.Through the FPGA logic control,achieving unity of high-speed data acquisition system timing and control.4.Performance test of high-speed data acquisition system.The data acquisition,data storage and data transmission functions are the core performance test of the high-speed data acquisition system.The specific results include:(1)FPGA as the master chip acquisit ion pulse signal matching ADC chip whose sampling frequency is 2Gsps,resolution is 12 bit.When the frequency of the input signal is 250 MHz,the SNR = 44.6639,ENOB = 7.1269,meet the design requirements;(2)FPGA as the master chip control DDR2 SDRAM.When transmission speed is 667 Mbps,the transmission data is correct.(3)FPGA as master chip transmit data in the DDR2 SDRAM matching Gigabit Ethernet interface,when the transmission speed is 1000 Mbps,the transmission of data accurate.In addition,for the conditioning circuit,when the valid frequency of input signal within 400 MHz,the SNR is high and reach the ADC full-scale input signal and meet the design requirements.Finally,the research work about the high-speed data acquisition system is summarized.This paper mainly analyze and design the data acquisition system based on the MALDI-TOF-MS,and test and verify the core function and key indexes of the high-speed data acquisition system board.The test results met the design requirements.Next study plan:(1)Improving furtherly the SNR of the conditioning circuit and ADC sampling circuit,to enhance the system measurement accuracy and measurement sensitivity by improving the hardware circuit,software filtering and other measures;(2)Integrating the independent logic which has completed and realizing the complete process of high-speed data acquisition system from ion pulse signal acquisition ? data storage ? data transmission,to provide key support for subsequent data analysis and generation of mass spectrum.(3)Developing computer data processing algorithms,to improve furtherly the measurement signal accuracy.(4)Developing high-speed data acquisition system application test evaluation on the mass spectrometer simulation platform.