| In the field of testing and measurement,especially the test of weaponry,the technologies of CPCI and embedded interface are being rapidly admitted and widely used along with the more complex measurand,the various testing occasions,and the people’s increasing awareness of modularization,portability and high reliability.This dissertation treated of the design of highly reliable and portable test platform with CPCI bus and DSP plus FPGA embedded interface technologies in the background of missile-borne computer test platform research.The design method and process of test platform are particularly expatiated.Firstly,this paper introduced the measurand missile-borne computer and its interface,and anylazed the test principle of missile-borne computer.Meanwhile,the feature and design method of CPCI interface was summarized according to the deep research on the specification of the design basis CPCI bus.And then this paper proposed a top-down overall design process and principle,analyzed the design requirement from a system design view,broached the embedded design method based on CPCI,brought forth the electrical design and the structrural design of the test platform,and discoursed the high reliability and portability of this design method on the test platform.In hardware design,the embedded interface was designed in detail,including the DSP plus FPGA design proposal,CPCI bus interface,UART,1553 B bus and analog interface,and the design of other components of test platform was presented,such as CPCI bus backboard,interfaces routing module and measurand power supply control and protection module.In terms of software,this paper mainly expounded the design of the embedded interface module,and discussed the windows driver and the upper layer test software of the test platform.Finally,the test result showed the validity and feasibility of the design method of embedded test platform based on CPCI. |