Font Size: a A A

The Radiation-hardened Circuit Design Of A Space-borne Remote Sensing Image Real-time Processing Chip

Posted on:2017-02-06Degree:MasterType:Thesis
Country:ChinaCandidate:S DongFull Text:PDF
GTID:2322330566956147Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
The Research topic of this paper is designing on a special SoC chip based on the demand of remote sensing image real-time processing on the star.In view of the on-orbit reliability demand for chips,this paper focuses on its radiation-hardened reinforcement design.Firstly,this paper analyzes the space radiation environment and the main mechanism of radiation effects.Then typical reinforcement techniques for the space-borne integrated circuit against total dose effect and single error effect were studied from the technological level,device level,circuit level and system fault tolerance design four aspects.Based on the above theory research and technology accumulation,and connecting with analysis of the chip architecture,dividing the internal resources of chip to I/O circuit,logical function circuit,clock circuit and reset circuit,clock circuit,and special function circuit,develop this chip radiation-hardened reinforcement scheme.In order to avoid the single error transient effect and the single error upset effect in the sequential circuits,we propose a method of triple modular redundancy in the RTL code design and developed a triple modular redundancy automation processing script and a method of RTL formal verification.For on chip memory,we used the EDAC information redundancy design based on(8,4)hamming code,and made the interrupt processing mechanism of EDAC calibration signal;Make triple modular processing for the clock circuit and insert delay,at the same time reduce the usage of the clock domain logic and the clock gating;Deburring of reset logic circuits,for the broadening,synchronous processing and soft reset,we conducted corresponded triple modular processing.For the special processing circuit,namely embedded high-performance CPU,some corresponding radiation-hardened reinforcements are made for its internal resources.Through the formal verification on the whole chip level and the FPGA prototype verification,the correctness of chip functions is ensured.Finally,we make an assessment of the comprehensive evaluation of chip area and power consumption.The analyzing results meet the design requirements,and some optimization ideas are put forward for the radiation-hardened design.
Keywords/Search Tags:SoC, radiation-harden, triple modular redundancy, EDAC, Formal verification
PDF Full Text Request
Related items