Design And Research Of HDMI Video Acquisition System Using Two Cameras Based On FPGA

In People's Daily life and industrial production, video monitoring system with its advantages of accurate, intuitive, and timely and rich information etc are widely used in security monitoring, traffic monitoring, satellite remote sensing, public security, remote control, artificial intelligence, etc. However, traditional analog and half digital and half analog video monitoring system of monitoring quality more and more cannot satisfy the requirements of people. People prefer to multiple perspectives, high-definition audio video monitoring system. For those requirements also prompted video monitoring system towards integration, network, intelligent, digitization direction development. This thesis aim at the existing video monitoring system current situation and the emergence of new technology, new ideas at the present stage, comes up with Design and Research of HDMI Video Acquisition System Using Two Cameras Based on FPGA.In this thesis, the video monitoring system is different from the traditional video monitoring system based on FPGA. It realizes the traditional hardware system development based on FPGA and SOPC combining the design scheme. In the meantime, it uses the algorithm level development tools DSP Builder software combined with mathematical analysis tools MATLAB software providing algorithmic support. Video acquisition terminal using economical and not occupy a space of CMOS camera, such a design is not only beneficial to the product popularity, but also more beneficial to obtain high-definition digital video image; video display terminal uses little by little popular monitor with HDMI port. HDMI port not only can be achieved only need single cable transmission the image and voice, but also beneficial to digital video signal high-definition displaying on monitor. In addition, this is beneficial to avoid video signal loss caused by more than once analog-to-digital conversion, So as to realize high-definition audio monitoring. The realization of software system is completed in the Nios II system integration development environment. The software part combined with Qsys system integration tools come true control indicator light and HDMI driver module. At the same time, the software part realizes the multiresolution adjustable on online.In the comprehensive development software of Quartus II,using Verilog HDL and IP reuse technology completion of development and designment on the FPGA chip. Need to build mainly modules on the FPGA: I2 C Interface temporal logic, I2 C write data logic and store the code on chip ROM mainly realize dual cameras register initialization and configuration; video acquisition logic, the clock domain transformation FIFO and DDR2 write buffer FIFO are mainly used to realize the video image capture and cache; DDR2 controller IP is used to control DDR2 SDRAM; SOPC module. SOPC builded on Qsys system integration tools, apart from some standard components invocation, also custom HDMI display mode control components, HDMI transmitter initialization control component and the improved neighborhood average method video enhancement components. After completing the whole video monitoring system, the related module has carried on the emulation proof. Finally, the thesis tests the clarity and smoothness of the video monitoring system.