45M~2.5GHZ Frequency Synthesizer Design

With the development of Io T(internet of everything), a transceiver working as an accept point is gradually translates from single mode to multi-mode to ensure the compatibility and and stability of the net. As the important building block of a transceiver, the frequeny synthesizer(FS) should provide high performance while keeping wide output range, which is strict for FS design.This article introduced a 45M~2.5GHz CPPLL frequency synthesizer from system structure, loop model, core building blocks and measurement. First, the background of multi-standard chip and research status and design methods of wideband frequency synthesizer is presented.Second, the main performance of frequency synthesizer, such as phase noise, spurs, locking time and their impacts on transceiver overall performance, is discussed in detail. After comparing several wideband frequency synthesizer design solution, utilizing only one low phase noise voltage controlled oscillator to design a compact wideband frequency synthesizer is determined as the designed synthesizer scheme in this paper.The detailed design process for frequency synthesizer is presented, including the loop model, loop filter theory. After the analysis, the detailed schematic of each block is presented. To optimize the inductor used in voltage controlled oscillator, the quality factor of differentinductor shapes is compared first. Utilizing a circle-shape-based inductor, the designed voltage controlled oscillator can improve phase noise performance by 2~3 d B. Some other building blocks such as phase frequency detector, charge pump, and programmable multi-mode divider are also introduced in detail.The wide band voltage controlled oscillator and FS are implemented in TSMC 0.18 1P6 M process,Finally, the measurement and analysis are present. The voltage controlled oscillator provides an output frequency of 2.24~4.95 GHz. The phase noise at 1MHz offset in the whole frequency output band is less than-124.2d Bc/Hz, and the minimal phase noise is-130.8d Bc/Hz. The normalized phase noise Fo M(Figure of Merit) is-172.8~-178.2d Bc/Hz. The measured output frequency of frequency synthesizer is 45M~2.47 GHz, and the phase noise in the whole output band is less than-117.9d Bc/Hz. The reference spurs is less than-65 d Bc, with an active die area of 1.03mm2.