MOSFET Ionizing Irradiation Model Compatible With Spice

Compared to other materials,semiconductor has irreplaceable superiority;factors that affect its performance are also different from the common influence factors of other materials.Such as all kinds of irradiation in space environment(X ray,gamma ray,etc.).The radiation induced charge in the semiconductor material;this extra charge has an irreversible impact effect on semiconductor materials,so the research of radiation performance of device becomes imperative.The main task of this thesis is to study the modeling of the additional charge and leakage current of the total irradiation dose in the NMOS.It is compatible with the existing circuit simulation technology;this can be used to simulate the radiation effect of NMOS in the circuit simulation environment,First of all,analyzed the generation theory of electron hole pairs and the transport process in the oxide,and studied the performance degradation of the devices in the irradiation environment.Such as threshold voltage,output current and transconductance,on this basis,the calculation formula of the extra charge introduced in the oxide layer is put forward,which is the basis of the radiation damage effect modeling.The effect of irradiation on the device performance is mainly due to the introduction of additional charge in the oxide layer,a single MOS device have gate oxide layer and isolated field oxide layer.With the size of the device more and smaller,the gate oxide layer is thinner,but the isolated field oxide thickness due to various reasons did not decrease,so the radiation damage effect is mainly concentrated on the isolation field oxide layer,isolation field oxide layer can be seen as a MIS transistor.Combined with previous research results about radiation,we summarize and put on a new simple formula about oxide trapped charge and interface trap charge,the transistor gate voltage as the parasitic transistor gate voltage.Analysis the changes of the thickness of isolation field oxide layer we can know that accumulation charge in different locations is different,so the parasitic transistor threshold voltage drift is different.Using the relationship between parasitic transistor threshold voltage and gate voltage,we can divide the field oxide region.There is only one kind of leakage current(sub-threshold current / linear current / saturation current)in each interval.The new model can be used to calculate the leakage current of the device in the irradiation environment more easily and accurately,we have done experiments and extracting third party data to validate the simulation results.Cadence circuit simulation software is used to program the new model to realize the simulation of parasitic leakage current in NMOS devices.Finally,we build a SDRAM memory based on NMOS,contrast voltage waveform before and after irradiation,we found after irradiation due to the early discharge of charge,unable to complete normal read and refresh process.