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Characteristics Analysis And Model Research Of RF LDMOS Power Transistor

Posted on:2018-04-17Degree:MasterType:Thesis
Country:ChinaCandidate:D D LiuFull Text:PDF
GTID:2348330515451609Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
RF LDMOS(Radio Frequency Lateral Double Diffused Metal Oxide Silicon),which has the advantages of high gain,good linearity,large output power,good stability and low cost,has became the preferred device in communication base station and radio frequency radar.However,the domestic research on RF LDMOS device is not mature.On the basis of domestic research status,design and development of a S-band RF LDMOS devices is carry out in this paper.In this paper,the RF LDMOS transistor’s source is connected to the P-type heavily doped substrate by the Trench Sinker structure.The double region LDD(Lightly Doped Drain)structure is apply to the drift region to optimize breakdown voltage and on-resistance.Metal field plate which connected to source was applied on the gate edge to modulate the electric field near the gate edge as well as decrease the capacitance between gate and drain.Based on the basic structure of RF LDMOS,the technology simulation of the device was implemented by TCAD simulation tool Silvaco.According to the simulation results,the trade-off among the specific-resistance,the reliability of the gate oxide and the breakdown voltage was achieved.Then,the injection dose of Pbody region,the length and doping distribution of the drift region,the length of the metal field plate as well as the thickness of oxide layer below the field plate were determined.The designed RF LDMOS was experimented.Breakdown voltage of device is 76 V,forword saturation current density is 225mA/mm.A L-type matched network was applied on the gate and a T-type network was applied on the drain to increase input and output impetance.The test results show that the drain efficiency is higher than 40%,the output power is higher than 100 W,and the power gain is higher than 10 dB with the test condition that the operating voltage is 30 V and the work frequency from 2.7 to 3.1GHz,which reached the target of design.Finally,a circuit model is development for the designed RF LDMOS transistor.One hand,based on the RF LDMOS small-signal circuit model,the parasitic parameters of the device were extracted by using the COLD-FET method.The intrinsic parameters of the LDMOS device were obtained by parasitic parameter stripping technique.Furtherly,the optimized LDMOS small signal circuit parameters was obtained by ADS simulation.On the other hand,large signal characteristic of the designed RF LDMOS was modeled on the basis of the small signal model.The non-linear current model is based on the MET model.For the non-linear capacitance model,a group of traditional empirical formulas were used.The fitting result of the model shows that the large signal model can describes the current and capacitance of the designed RF LDMOS well.
Keywords/Search Tags:RF LDMOS, S band, model, simiulation
PDF Full Text Request
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