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Research On Suppressing Single Effect Upset For Memory Cell Of SRAM

Posted on:2018-02-18Degree:MasterType:Thesis
Country:ChinaCandidate:P H DingFull Text:PDF
GTID:2348330515979878Subject:Circuits and Systems
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With the exploration of outer space,astronautics electronics equipment faces more complex radiation environments.For integrated circuits in spacecraft,memory occupies an extremely important position.The anti-radiation performance of the memory directly affects the stability of the aerospace equipment.When a single particle is incident on the circuit,it may cause changes in the memory cell data,i.e.,SEU(Single Event Upset).With the continuous reduction of process size and increasing circuit integration,the harm made by single particle to the memory is increasingly serious.Traditional hardening techniques,such as SOI processes,are costly and their parasitic effect can not be ignored,and circuit-level techniques which add redundant storage nodes require additional area overhead while the improvement of circuit integration has made the design a failure.In the thesis,the effect of single particle on SRAM memory cell is studied,and a corresponding hardening method is proposed.The work of the thesis is as follows:First,we introduced the radiation environment and ionizing radiation effects,then we introduced memory cells’ hardening methods at home and abroad from four aspects,circuit,process,layout,and system.For the ionizing radiation effect,we introduced several common single event effects and their mechanism in detail,including the generation and the collection processes of charge after the single particle incident semiconductor device;We elaborated three methods to describe SEE modeling from circuit.device and mix mode levels,and did an exhaustive introduction of Sentaurus TCAD.Second,we introduced the structure and working principle of the memory cell of SRAM,and used mix mode method to build up physical model and process device simulation by using the Sentaurus TCAD,which included doing process calibrating to the PMOS,used this PMOS and NMOS which is SPICE model parameters to build a 6-transistors memory cell and verified its’ read and write functions;We used different energy.single particle to incident to the memory cell and the simulation。result showed that the store information caused two phenomenons:SEU(Single Event Upset)andUpset Reversal,then the influence of different angles,working voltage and spacing on the critical LET(Linear Energy Transfer)thresholds of the two phenomenons was studied.The simulation results show that the mechanism of the upset reversal effect can be used to radiation hardening for the memory cell.Finally,by changing the effect of different process doping concentration on the upset reversal effect of the memory cell,we found that changing the P+ deep well concentration,the n-well concentration and the threshold doping concentration in the device model would affect the time and critical LET threshold of memory cell.In the thesis,the hardening method to the SRAM memory cell is achieved by adjusting the doping concentrations to reduce the time required for reversal and the critical LET threshold of the recovery effect.
Keywords/Search Tags:memory cell, SEE, critical LET threshold, process parameter
PDF Full Text Request
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