Design And Implementation Of Demapping For Rotated Constellation And Multipath Time-varying Channel Simulation

The rotational constellation modulation technology proposed by DVB-T2(Digital Video Broadcasting: 2nd Generation Terrestrial)proposed a higher requirement for the demapper of the receiver at the same time as the spatial diversity gain.This paper focuses on the analysis,implementation and hardware verification of the rotation constellation mapping algorithm,including:First,based on the existing standards,this paper presents a simulation and comparison of the proposed constellation algorithm.The algorithm includes max-log algorithm,partitioned sub-interval algorithm and the best alternative algorithm.Second,according to the simulation results,this paper implements alternative point algorithm which is the best in performance and complexity,and the hardware implementation is simplified,the hardware implementation design use two ways of implementation: Xilinx’s new HLS design and The traditional FPGA hardware design.Thirdly,considering rotating constellation modulation technology to showing the advantages under the time-varying channel,this paper also builds and simulates the multi-path time-varying channel simulator based on improved Jakes model and implements it with FPGA.The Jakes model is further simplified when it is implemented,and a hardware implementation scheme with low complexity is proposed.The performance of improved Jakes model is almost the same as that of Jakes model.Finally,the rotating constellation module is combined with the multi-path time-varying channel simulator module for testing and performance analysis.The results show that the optimal candidate point algorithm and the performance of the multi-path time-varying channel simulator can reach the standard.