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The Parallel Decoder For HEVC Based On CPU+GPU Heterogeneous Platform

Posted on:2018-05-25Degree:MasterType:Thesis
Country:ChinaCandidate:A D MaFull Text:PDF
GTID:2348330536462028Subject:Information and Communication Engineering
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HEVC(High Efficiency Video Coding)standard officially became the latest generation of international video coding standard in January 2013,the publishment of which greatly promotes the development of the video compression technology.As the newest generation video coding standard,compared with the last generation video coding standard H.264,HEVC can get an average bit rate reduction of about 50%with the same perceptual video quality.However,the increasing in the compression ratio is at the cost of the increased computational complexity and the difficulty in the codec is increased at the same time,especially in the decoder,the complexity of the code stream will directly influence the speed of the decoder,decreasing the speed of the video playing and restricting the practical application of HEVC.In order to implement the HEVC decoder efficiently,we designed a CPU+GPU heterogeneous framework for the HEVC decoder in this thesis,fulfilling the task of decoding efficiently with the collaboration of CPU and GPU.In this framework,the reconstruction processes with high computation complexity,including the intra/inter decoder,inverse quantization(IQ),the inverse discrete cosine transformation,the de-blocking filter(DF),and the sample adaptive offset(SAO),are processed by GPU in parallel,exploiting GPU many-core computing ability sufficiently by designing high efficient parallel algorithms for them.For the modules of the NAL bit stream parsing and the CAB AC bit stream decoding,we implement them by using CPU with serial algorithms in view of the fact that there exit close context relations in both of the two modules.Further,in this decoding framework,four parallel threads are allocated in CPU,which are the primary thread,the affiliated thread 1,the affiliated thread 2 and the affiliated thread 3,respectively.The primary thread is working for the scheduling of the affiliated threads and the GPU.The affiliated thread 1 and 2 are working for the NAL bit stream parsing and the CAB AC bit stream decoding,respectively.The affiliated thread 3 is working for the process of the video playing and the GPU is working for the whole image reconstruction process.By the good cooperation of CPU and GPU,the whole scheme can realize the execution among the NAL bit stream parsing,the CABAC bit stream decoding,the image reconstruction and the video playing processes in parallel.As a result,the time of decoding one frame can be decreased to the longest time of the four processes,greatly increasing the decoding speed.In the work,we implement the parallel framework and the parallel algorithms on the platform of compute unified device architecture(CUDA)and test them with many different video sequences.The experimental results show that the parallel decoder can achieve a significant improvement on the efficiency of the whole decoding process,when processing the code stream of ultra high definition(UHD)video sequences with CPU Intel CoreTM i7-7700 and GPU GTX1080,the speed-up ratio can get more than 75,and the frame rate is more than 55 f/s,which can realize the real-time decoding for the high definition(HD)videos and even for the UHD videos under the same perceptual video quality.
Keywords/Search Tags:HEVC Decoder, Parallel Algorithm, Multithreading, CPU+GPU
PDF Full Text Request
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