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High Resolution And High Frame CCD Image Sensor-Driven System Design And Realization

Posted on:2016-02-09Degree:MasterType:Thesis
Country:ChinaCandidate:M Y WeiFull Text:PDF
GTID:2348330542974028Subject:Control theory and control engineering
Abstract/Summary:PDF Full Text Request
CCD image sensor with high resolution,wide dynamic range,high photon conversion efficiency,low noise and high sensitivity,it was widely used in the production of military life and scientific research.The main work of this paper is to study the interline transfere array CCD image sensor drive circuit design and implementation,based on the Sony ICX625 AQA interline transfer area array CCD,peripheral drive circuit design to complete the driver written by a preliminary experiment tested the drive system functions.Firstly,the basic working principle of the CCD in detail to explain the key technical parameters commonly used across the array CCD image sensor driver circuit dedicated IC method and programmable logic devices France-depth analysis of the two drive circuit design to compare the advantages and disadvantages on the basis of the discussion and analysis of its design,to learn the advantages of proposed drive system design solutions.Secondly,according to the established overall design,select high-resolution high frame rate of interline transfer array CCD image sensor ICX625 AQA,select the main chip,the horizontal clock driver chip,vertical clock driver chip and a power supply in-depth understanding of how it works on the basis of power chips,a detailed analysis of the selected chip functions,ultimately determining circuit design principles and design solutions to complete the hardware part of the drive circuit,while selecting the appropriate sensor optical lens according to demand.The drive circuit driver has completed the process of writing,to give full play in the control chip field programmable logic array(FPGA)suitable for parallel operation characteristics,using verilog HDL language driver timing partial programming,give full play to the hardware description language on the timing operation,as well as to facilitate data readout and program flow control using NIOS soft-core programming in the master and data interfaces,as part of the program will combine the two programs written verlog HDL AVALON bus package into compliance with the rules of the module is mounted in NIOS system.Finally,the drive system simulation testing and debugging experiment,the key signal using the Signal TAP tools for simulation,experimental testing of the drive signal,the simulation and experimental results show that,CCD image sensor drive system designed to drive the output of the CCD image sensor required signal.
Keywords/Search Tags:Interline transfer area array CCD, Field programmable logic array, NIOS soft core
PDF Full Text Request
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