Research And Design On The High Reliability LDO

With the increase of chip integration,the widespread use of digital-analog hybrid chips and the reduction of input power supply voltage,the power supply noise has a greater impact on signal propagation.LDO linear regulators have received extensive attention due to their low noise and high power supply rejection ratio.The traditional LDO circuit mainly uses the compensation method of equivalent series resistance(ESR)and Miller capacitance to improve the loop AC characteristics.However,when the load current changes,it usually causes the zero-pole frequency of the loop to change,resulting in the reduction of system stability and this usually limits the use of LDO.This paper designs a high reliability LDO linear regulator based on dynamic frequency compensation technology and it also studied the traditional method of frequency compensation.This design increases the LDO loop gain and transient response characteristics by adding a voltage buffer.The circuit uses a frequency-compensation method that tracks the change of the load current.By selecting compensation parameters that are proportional to the change of load current,we can obtain a set of compensation parameters that ensure that the system has sufficient phase margin at different load currents.Overcoming the problem that the stability of the loop is degraded due to the change of zero-pole frequency which is influenced by the load of the LDO.In this paper,the hysteresis over-temperature protection was used.When the temperature is higher than 170°C,the circuit of over-temperature protection will turned on and the pass transistor will be turned off.When the temperature is lower than 130°C,the over-temperature protection circuit is turned off and the LDO resumes its normal operation mode.In order to prevent the pass transistor from being damaged due to excessive output power,the design used a circuit which could limit it’s current.When the temperature or the input power supply voltage changes,the current’s limition can be adjusted due to the change of the maximum output current.At this time,the current’s limit of the overcurrent protection circuit can be adjusted by an external resistor,which increases the operating range of the LDO.At the same time,in order to prevent the pass transistor from falling into the saturation region,the loop gain is reduced and the system stability is reduced.This design realized the asynchronous shutdown of the LDO when the pass transistor enters the saturation region and improves the reliability of the LDO.This paper presented a LDO circuit based on dynamic-frequency compensation.The design improved LDO loop gain and transient-response characteristics by adding a voltage buffer.The circuit used a current mirror to sample the current of pass transistor,making the frequency of the main pole and the third pole presente the same change with the load current.This way overcame the problem of loop stability caused by LDO’s zeros and poles changing with load current.The design used CETC 24 th Institute’s HC12 BJT technology and simulated by Specter simulation tool to studied the LDO’s frequency characteristic under different load current.The simulation results demonstrated that the LDO loop has a phase margin of 50° to 70° when load current varied from 10μA to 100 mA.This meant that the proposed LDO regulator had high stability.