X-Ray Detector Digital Circuit And Test System Design

As one of the applications of synchrotron radiation devices,X-ray detection systems are widely used in medical,industrial CT,non-destructive testing of key parts.Throughout the development of X-ray detection systems,the key technologies are basically mastered or even monopolized by foreign countries.The whole set of surface array detection systems developed by DECTRIS has a price of more than 10 million US dollars.As one of the core components of the system,the X-ray detector readout chip plays a vital role in the whole system.The High-performance readout chip is also one of the hot research directions of the X-ray detection system.The X-ray detector readout chip is a digital-analog hybrid chip,which internally contains digital circuits and analog circuits.The analog circuit has the functions of charge integration and analog-to-digital conversion.The information represrenting the energy of the X-ray particles is finally output in the form of digital signals,and the digital circuits in the latter stage perform noise suppression,data writing,reading,and mode configuration.Under the control of the global timing,each sub-circuit of the chip performs an orderly cooperation,and finally the information is read out.From the perspective of practical engineering applications,this paper focuses on the design of digital circuits in X-ray detector readout chips.The read chip integrates a digital circuit such as a trimming circuit,a shift writing readout circuit,a global timing control circuit,and an SPI interface.The trimming circuit can suppress the noise of the pre-stage analog circuit.The shift write and readout circuits provide an interface for data input and output.The chip data is output and the external data input is also written to the chip.The externally input data can periodically refresh the internal parameters of the chip pixel unit,so that the chip has a certain anti-radiation capability.Under the control of the global sequential circuit,the digital circuit and the analog circuit inside the chip work in a pipeline manner,and the number of pipeline stages is two levels.The detection mode of the chip,and the parameters related to the detection mode are separately configured using the SPI slave interface.Finally,the chip tape-out using the domestic 130 nm process.In order to facilitate chip testing,a high-speed data acquisition and transmission system and a dedicated test board are designed.The high-speed data acquisition and real-time transmission system consists of FPGA,DDR2 and USB3.0 interface chips.The system can simultaneously collect 24 channels of 100 Mbps chip output data,and upload the data to the computer in real time through the USB3.0 interface.The interface bandwidth can support up to 3 X-ray detector readout chip cascading tests.The test board provides a low-ripple,dual-channel power supply with a maximum current of 1A and an LVDS interface for high-speed signal transmission.At 64 MHz main clock frequency,the chip's digital-to-analog communication,read/write function,timing control function,and trimming function are all normal.The maximum deviation of each pixel unit after correction is 5,uniformity is good,and the power consumption of a single pixel unit digital circuit It is 40.6?W,and all functions have reached the design specifications.