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Design And Implementation Of Master Controller For Through Bit Array Acoustic Logging

Posted on:2021-05-30Degree:MasterType:Thesis
Country:ChinaCandidate:Z Z HuangFull Text:PDF
GTID:2381330602495906Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
Petroleum logging technology plays an important role in petroleum exploration and exploitation.In view of the current difficulties in horizontal and highly deviated well logging,the acoustic logging technology through drilling tool array is proposed.the acoustic logging technology through drilling tool array can avoid high-risk operation problems such as blocking and jamming that may occur in conventional cable logging,and improve logging efficiency.The control circuit module is one of the most important part of the acoustic logging through drilling tool array.It is transmission link between the instrument and the acquisition processing module,and it is also the control center of acquisition working flow.In order to meet the functional requirements and the performance specifications of through bit array acoustic logging,this paper proposes a design scheme of the master controller for the acoustic logging through drilling tool array.This scheme uses one FPGA-A3P1000 as master controller to provide all control functions the controller should provide,such as generating trigger signals of multi-mode acoustic excitation,providing basic timing sequence for array acoustic acquisition,collecting auxiliary data,arranging and storing data,providing USB interface with computer and CAN interface with cable communication module,etc.The experimental results show that the master controller entirely based on FPGA-A3P1000 can provide precise and reliable control timing sequence for through bit array acoustic logging.Compared with the multi-MCU scheme and the FPGA+DSP scheme,the master controller has the advantages of higher integration,lower power consumption and more precise control timing.The main innovations of this paper are as follows:1.Lower power consumption: Power consumption only 1560 MW by cancel DSP;2.Higher integration: complete all requirements on the PCB area of 278 mm long and 38 mm wide;3.Large capacity data storage: the nandflash storage scheme with 16 GB memory is designed,which can store 7-hour working acoustic data;4.High speed transmission: USB2.0 interface is designed to realize 48 mbps transmission rate;5.Lower bit error rate: The LVDS transmission interface is designed;...
Keywords/Search Tags:through bit logging, FPGA, multi-mode excitation, array acquistion, High capacity storage
PDF Full Text Request
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