Realization Of Character Recognition Algorithm Based On FPGA In License Plate Recognition System

License plate recognition technology is the key technology of Intelligent Transportation System,and it is widely used in traffic flow control,management of vehicles and high-speed road ETC,etc.Recognition of characters on license plate is playing an important role in the whole license plate recognition system,which affects the overall recognition rate directly.In practical application,the recognition rate of license plate characters is not only related to its own structure and algorithm,but also the accuracy of the location and character segmentation of the license plate.Also it has a wide use in many scenes.So it has become a hot topic both at home and abroad.This paper focuses on the realization of license plate recognition algorithm in real world,and design circuit for license plate location,character segmentation and character recognition.Then builds the hardware platform to complete the FPGA(Field Programmable Gate Array)verification for the whole circuit.All parts in this paper include the design and verification of the algorithm and the hardware circuit.In this paper,we made a hardware adaptability improvement for the plate location algorithm firstly,and designed a variety of new circuit structures.All the modules in the license plate positioning circuit can meet the goal of pipeline processing,and so reduced the processing time and improved the positioning accuracy;In the character segmentation circuit,this paper make a combination of the connected area marking algorithm and vertical projection algorithm and make use of the characteristic of the license plate to segment the plate,which improves the segmentation accuracy and rate and reduce the hardware resource occupation.In the character recognition algorithm,a new support vector machine(SVM)structure is proposed to realized character recognition,which not only simplified the structure and levels of multi-class support vector machine,but also accelerates the recognition accuracy and rate.Finally,this paper combined the three parts to complete the entire design,and carry out the FPGA verification.The implementation of the hardware circuit is using Verilog HDL to design RTL code,and using Modelsim software to simulate firstly.And then make RTL code logic synthesis,physical layout implementation using Quartus II software.With the experimental results,the accuracy of the recognition algorithm proposed in this paper can reach 92%.When the original image size is 640×480 and the work clock is 100 MHz,the overall recognition time is less than 5 ms,and it can process the video signal of 50 frame per second in real time which is a great reference to the hardware implementation of license plate recognition system.The characteristics and innovations of the subject are mainly reflected in the following aspects.Firstly,the whole algorithm is realized using the pure hardware circuit,which greatly improves the recognition rate without reducing the recognition accuracy.Secondly,the proposed combination SVM structure can realize the character recognition quickly and accurately,and occupy less hardware resource.Last but not list,the paper makes a structural improvement on the connected area marking circuit to get marking information by one scan,which makes the whole license plate positioning module can realize the pipeline processing.