EBsCMOS Camera Drive System Development

Extreme low light high resolution imaging has a wide range of needs in defense,space science and other fields,including night vision,investigation,scientific applications and so on.The demand drive in many fields is advancing the performance of the low light imaging sensor.The development of modern technology,especially the development of low-noise back-illuminated CMOS devices,has laid the foundation for developing high-end EBs CMOS optical imaging devices.However,compared to the European and American countries,the development level of domestic EBs CMOS is lagging behind.Therefore,research and development of EBs CMOS camera driving system has a significant research impact.In order to meet the needs of domestic EBs CMOS low-light imaging detectors,we use the existing domestic back-illuminated s CMOS image sensor Gsense400 BSI to conduct research EBs CMOS.First of all,thesis analyzed its performance,described its features and its imaging methods.According to the device's driving requirements,Xilinx's Spartan-6 series FPGAs were used to control the entire camera system.The memory DDR2 was used to buffer the received image data,and the USB 3.0 interface was used as the interface of the camera system to transmit the images.The work done in this thesis mainly includes:1.Developed a design scheme for the EBs CMOS compact camera system.By analyzing the key technologies of low-light imaging,comparing the device types of the low-light imaging system.Finally,the CMOS image sensor was selected as the image acquisition unit,chose the FPGA as the system control core,used the DDR2-SDRAM as the image buffer,and used the USB3.0 interface as a data transfer unit to transfer images.2.Designed the EBs CMOS camera system hardware circuit.Included: s CMOS peripheral circuit,FPGA control circuit,DDR2-SDRAM buffer circuit and USB3.0 transmission circuit.And according to the schematic diagram,used Cadence to draw PCB Layout circuit layout.3.Based on the hardware description language Verilog,this thesis designed the camera drive system timing logic,included: s CMOS image sensor drive timing,LVDS image reception timing logic,DDR2 cache read and write timing logic,USB3.0 image output timing logic.And had verified the timing of the simulation waveform.Through the above work,an FPGA-based EBs CMOS compact camera hardware drive system was completed,and the frame rate and resolution could meet the design requirements.The camera system transmited the image data to the upper computer through USB3.0.This design had a far-reaching impact for EBs CMOS imaging research.