Font Size: a A A

Design And Verification Of Adaptive Digital System Based On Fast Hybrid Reconfiguration

Posted on:2019-03-22Degree:MasterType:Thesis
Country:ChinaCandidate:P ZhuFull Text:PDF
GTID:2382330596950463Subject:Engineering
Abstract/Summary:PDF Full Text Request
Evolvable Hardware(EHW)based on Field Programmable Gate Array(FPGA)open up new possibility towards building highly efficient self-adaptive systems and self-repairing systems.Currently,state of the art EHW circuit is mainly based on a Virtual Reconfigurable Circuit(VRC)and Native Reconfigurable Circuit(NRC).However,both of these solutions have limitations.The VRC-based suffers from huge resource overhead and circuit delay,and the NRC-based has slow circuit configuration rate and low circuit flexibility.Therefore,this paper merges the two schemes to design fast and flexible adaptive digital system architecture,taking the FPGA implementation of adaptive image filter and self-repairing DC motor control system as examples,the architecture is verified.The main research works are as follows:(1)The related works of EHW technology research,as well as the advantages and disadvantages of existing reconfiguration methods of FPGA used are analyzed.By comparison,the EHW scheme using a combination of NRC and VRC is selected to design adaptive system.The hardware platform Xilinx Virtex-6 FPGA development board ML605,the corresponding FPGA resource structure and the software development tool ISE Design Suit are introduced.The basic principle and implementation method of Genetic Algorithm(GA)as search engine are analyzed.(2)The overall architecture of adaptive digital system based on fast hybrid reconfiguration is proposed.The hardware design method of the system is given in detail,including the design of evolvable module,the design of adaptive IP core,the construction of hardware platform,the design of IP core for storing bitstream and the design of bitstream relocation.The software design method of the system is briefly introduced,including genetic coding,fitness evaluation,genetic operator design in GA,the principle and implementation of discrepancy configuration and general process of adaptive evolution.(3)On the Xilinx Virtex-6 FPGA development board ML605,with MicroBlaze used as the self-adaptive controller,taking image filter as an example,the design of fast hybrid reconfiguration adaptive system architecture is experimentally verified.The experiment results of adaptive filter are given.The performances of the system are evaluated in terms of hardware resource consumption,timing analysis,bitstream storage space consumption and evolution time.(4)With MicroBlaze used as the self-repairing controller,taking the self-repairing DC motor control system implemented on FPGA as an example,the design of fast hybrid reconfiguration system architecture is experimentally verified.The basic principle and implementation method of brushless DC motor system are analyzed,and the overall system structure and function of each module are given.The design of self-repairing IP core,circuit evaluation scheme,fault injection scheme and system repair process are given.Through simulated fault injection experiments,the system repair results are analyzed under different fault resources.The reliability and resource cost of the system are also analyzed.
Keywords/Search Tags:Evolvable Hardware(EHW), Native Reconfigurable Circuit(NRC), Virtual Reconfigurable Circuit(VRC), Bitstream Relocation, Discrepancy Configuration, Self-adaptive and Self-repairing
PDF Full Text Request
Related items