Research And Design Of ECG Signal Readout Circuit

The heart is the most important organ of human body.Its beating can reflect whether the state of human body is normal or not.The beating of heart can generate ECG signal and extract the signal can be used as a basis for observing the state of the heart.Therefore,the ECG signal readout circuit has always been a research hotspot.In recent years,the portable heart monitoring system has attracted people's attention.Therefore,it is of great significance to research and design high-performance ECG signal readout circuits.This paper mainly completed the research and design of ECG readout circuit for ECG monitoring system.The circuit consists of five modules,which are the main amplifier,the charge pump circuit,the lead off detection circuit,the fast recovery circuit and the rail to rail operational amplifier.The design of the system is divided into two stages:the first stage is the completion of the main amplifier design and the tape-out test;the second stage includes the improvement of the defects of the first stage of the circuit,and the design of the charge pump circuit,the lead off detection circuit,the fast recovery circuit and the rail to rail operational amplifier.In this paper,the readout circuit of traditional ECG signal has low common-mode rejection ratio,limited input common-mode range,more off-chip components and more signal interference.A current feedback instrumentation amplifier and an offset suppression circuit are added as the main amplifier of the system.Using charge pump to improve the input common mode range of the circuit.Considering that the lead wire of the monitoring system will fall of f,a lead off detection module is designed in this paper.Since the system signal setup time is too long,a quick recovery circuit is designed in this paper,which effectively reduces the setup time.Three rail-to-rail operational amplifiers A1,A2,A3 are integrated in the system.Al is used to provide low pass filtering and extra gain.A2 is used to suppress power line interference.A3 is used to provide reference voltage.The chip is designed based on the GLOBAL FOUNDRIES 0.18p.m CMOS process and the first stage circuit was taped out.The chip area is 346?m×346?m.The test results show that when the power supply voltage is 2V.The 3dB bandwidth of the circuit is 2kHz,the total harmonic distortion is-64dB,and the common mode rejection ratio is 120dB.In the range of 0.1Hz?100Hz,the total input reference noise is 0.78?Vrms.Power consumption is 121.6?W.It can eliminate the offset voltage of 140mV.The second stage simulation results show thatin the power supply voltage 2V,the 3dB bandwidth of the main amplifier is 2kHz,the total harmonic distortion is-75.4dB,and the common mode rejection ratio is 118dB.The total input reference noise at 2kHz bandwidth is 0.85?Vrms and the charge pump output voltage is 3.9V.The bandwidth of rail to rail operational amplifiers A1,A2 and A3 is 448kHz,and the DC gain is 126dB.The main achievements and conclusions of this paper are as follows:(1)This paper uses integral feedback as offset suppression to reduce off-chip components and the effect of offset voltage.(2)In the way of improving the input common-mode range of the circuit,this article uses the charge pump boost method to increase the power supply voltage of the main amplifier input stage of the system by two times,making the input common-mode range higher than the system supply voltage.(3)The circuit designed in this paper has lead detection function,which enriches the function of the circuit and is convenient for consumers.The above research and design results show that the ECG signal readout circuit designed in this paper meets the design requirements,has better performance,more complete functions,and has good practical significance.