| In recent years,people have paid more and more attention to the prevention of cardiovascular diseases,so that the ECG signal acquisition chip has became a research focus in the field of integrated circuits.The performance of the analog front-end circuit in the ECG signal acquisition chip greatly determines the accuracy of the ECG signal acquisition.By analyzing the characteristics of the ECG signal and the electrical model of the electrode patch,an analog front-end circuit with low power consumption and low noise is designed in this work.The ECG signal acquisition analog front-end circuit designed in this paper used channel multiplexing technology to reduce the circuit power consumption and scale.It mainly consisted of a multi-channel data selection circuit,an instrumentation amplifier,and a variable gain amplifier.The instrumentation amplifier adopted chopper modulation technology to reduce 1/f noise.The core circuit of instrumentation adopts a fully differential input-output amplifier and a capacitive coupling structure to improve common-mode rejection performance and low-frequency input impedance,respectively.The circuit system adopts a ring oscillator and an RC oscillator to provide 1 k Hz and20 k Hz clock signals,respectively.In addition,a variable gain amplifier is adopted to reduce the amplitude variation of the ECG signal caused by the acquisition environment and the individual acquisition.The variable gain amplifier can provide 0 d B,6 d B,12 d B,18 d B adjustable gain,and the amplifier can provide rail-to-rail output swing.The ECG signal acquisition analog front-end circuit and layout are designed in 0.18μm CMOS technology.The simulation results show that the circuit consumed 140μA and gave 40~60d B(Uniformly variable)gain and 130 d B CMRR in the bandwidth 7.6 k Hz.The equivalent input noise of the ECG signal acquisition analog front-end circuit is 6.5μVrms,and the layout area was0.38×0.41 mm2.The performance of the circuit can realize the acquisition of ECG signal. |