Fast Power Integrity Analysis Based On 2-D Finite Element Method

As high-speed circuits become more complicated with use of multi-power domain and decreasing voltage supplies,power integrity(PI)becomes worse,due to excessive IR voltage drop and large current density in power distribution network(PDN).Unchecked large currents can lead to mil-function of the circuits and catastrophic failure of the whole board.In the context of the design of high-speed printed circuit board(PCB)and package,power integrity analysis is an essential part of the design and verification flow.Currently,power integrity analysis methods can be classified into two categories.The first one is based on 3-D full wave analysis,such as finite element method,boundary element method and finite difference method.They are widely used numerical methods used for computing 3-D electromagnetic field parameters.The other one characterizes for power distribution network using compact models,such as partial element equivalent circuit model and multi-layer finite difference method.The 3-D based methods are very accurate but suffer high computation costs,especially in the iterative PCB design process.The second method can speed up the computation by building a simplified and compact model for power distribution network at the costs of accuracy loss.However,it does not work well,if works at all,when analyzing power distribution network with complicated shapes and structure due to its structured subdomain partitions.This thesis proposes a new fast computing method for direct current density and power density analysis,which takes advantages of both finite element method and compact models.The new method can be viewed as 2.5-D geometrical model considering a multi-layer planar structure for 3-D power distribution network.In this method,a 2-D meshing is first constructed for each layer and linked by simplified 1-D vias,then 2-D finite element method is carried out to solve the resulting problem.We further propose a few techniques to further reduce the number of finite elements or mesh sizes in the PCB structures so that the accuracy and efficiency can be easily traded off and controllable.In this way,we can significantly improve the analysis efficiency with adjustable accuracy loss.The proposed method is verified by comparing with commercial Cadence Sigrity Power DC.Our experimental results show that the proposed analysis method is more than 2 times faster than the Power DC with relative errors less than 2%.Furthermore,to mitigate the traditional way of building the topology of power networks,which is time-consuming and strenuous but also error-prone,this thesis also proposes a complete analysis automation solution.It offers design reference,simulation and verification for component wiring and physical geometries designing on PCB.