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Research On Key Technologies Of High-frequency And High-Power-Density Half-Bridge Gate Driver

Posted on:2020-07-02Degree:MasterType:Thesis
Country:ChinaCandidate:X ZhangFull Text:PDF
GTID:2392330596976203Subject:Microelectronics and Solid State Electronics
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Driven by the demand of energy-efficiency and miniaturized power supplies,high-frequency high-power-density power converters have been seen significant increase in researches and applications in the field of power management technology.While due to the excellent properties in higher switching frequency and higher power-converting efficiency,the third-generation power semiconductor GaN has guradually become commercialized with the contimuous improvement of the reliability of its poer devices.Limiting the upper operating frequency as well as determining the reliability of the power stage control and the EMI performance of the system,high-frequency high-power-density harf-bridge gate drive technologies becomes the core of such power conversion solutions.The key technologies of high-frequency high-power-density half-bridge gate drive mainly comprise CMTI?Common-Mode Transient Immunity?performance enhanced,propagation delay reduced?such as using high-speed Level Shift circuit?,stable power device switching performance achieved?such as saturated and low-ripply high-side power supply generated by Bootstrap circuit?,EMI controll of the hard-switch power stage?such as slope-controll technology of the voltage of switching node?,etc.These key technologies can be reflected in applications such as automotive power supply,server power supply for data center,and envelope tracking HPA power supply in telecom.Based on the requirements of above high-frequency and high-power-density power supply applications,two high-speed,high-reliability of signal transmission,and high CMTI Level Shift circuits are proposed.The maximum operating voltage of the proposed LS circuits are up to 80V,whose characteristics comprise 50V/ns CMTI capability,under 5ns propagation delay,rail-to-rail output in the case that high-side driver reference ground reaches-3V VDC.Two Bootstrap circuits with floating bias control are proposed,which can provide saturated and low-ripply high-side power supply under the working circumstances that the operating frequency is up to 5MHz,the lowest VDC of high-side driver reference ground reaches-3V,and the Qg of the power device is typically 8nC.The proposed Bootstrap circuits also provide a second floating bias to ensure high-speed,high-reliability signal transmission of the Level Shift circuit.The proposed Level Shift circuits and Bootstrap circuits are on-chip intergrated in three gate drive chips for GaN power devices,equipped with TTL input detection circuit,protection circuits and power stage buffer with asymmetric push-pull structure.The ESD design,chip Layout and PCB layout consideration are also proposed for systematic design.The gate drive systems meet requirements of half-bridge gate drive applications for GaN power devices where the primary power supply voltage VIN|max=75V,opertating frequency fSW|max=5MHz,typical power conversion is 48V-12V and maximum load current reaches 25A.The GaN gate drivers are designed,simulated,fabricated and tested in 0.35?m 80V HVCMOS?with a front-line process node of 0.5?m?.The test results show that the gate driver achieves 26ns propagation delay for both high-side and low-side drive circuits,4ns propagation delay matching and stable power supply for high-side drive circuits,meeting the system application requirements.
Keywords/Search Tags:high-frequency high-power-density half-bridge gate drive, gate drive circuit for GaN devices, CMTI, Level Shift circuit, Bootstrap circuit
PDF Full Text Request
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