Design Of Front-end Readout Circuit Pixel Unit Circuit For Counting X-ray Detector

X-ray detector technology is widely adopted in medical,industrial,scientific research and other fields due to its high resolution and high detection efficiency.Its wide application and complex work environment put forward higher requirements for imaging quality.As the core circuit of X-ray detection system,however,the readout circuit is not completely understood and some technical problems are waiting to be solved.Therefore,the development of high-performance readout circuit is an important subject in the X-ray detection field.In this paper,the theory and technology of X-ray detector readout circuit pixel unit circuit is studied,and a kind of highperformance X-ray detector readout circuit is proposed.The X-ray detector readout circuit pixel unit circuit is a hybrid circuit composed of analog circuit and digital circuit.The analog circuit has the function of charge integration,filtering and forming,and digital signal conversion and so on.The digital circuit completes the I/O function,and mode configuration.According to the global time sequence.The digital signal output of X-ray energy information is realized by the cooperation of sub circuits.Based on the 0.13μm CMOS process,the performance requirements of the Xray detector read-out circuit pixel unit circuit are put forward.Firstly,the module circuit is designed.Secondly,the parameters are adjusted for the indicator.Finally,the simulation is verified.The main work in this thesis as follows:1.This paper introduces the developing history and characteristics of the x-ray detector reading circuit,and focuses on its analog part of the X-ray detector read out circuit pixel unit circuit.The framework of the front-end readout circuit in X-ray detector is designed according to the characteristics of the X-ray detector output signal.This circuit consists of charge-sensitive preamplifier(CSA),Polar and zero phase-off(PZC),Forming amplification(CR-RC),and threshold adjustable comparator,etc.This paper analysis various circuit structures of different modules,choose the optimal circuit of each module,illustrate the circuit principle and key parameters,and finally complete the circuit simulation and layout.2.Based on the simulation of front-end read-out circuit designed,some results indicate that.Circuit gain can be adjustable,this design achieves a three-stage gain conversion,and realize the function of forming time regulation,the front-end read-out circuit pixel array is 1×128.With the power of 3.3V,the effective input charge in range is 1f C ～18f C,the nonlinearity is less than 1%,the input ENC is 185.99e-,the single channel power consumption is 189.4μW,the count rate is greater than1 Mbps.The simulation results are given that the circuit is designed with low noise,low power consumption,high count rate and so on.Each indicator satisfies its corresponding requirements.