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The Design And Implementation Of Star Image Centroid Detection Algorithm Based On FPGA

Posted on:2020-06-22Degree:MasterType:Thesis
Country:ChinaCandidate:B LiuFull Text:PDF
GTID:2392330620460044Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
The star tracker is a precision instrument on spacecrafts which samples star images from space,takes star as reference and means important to spacecrafts' guidance system.The star detection unit,which adopts star centroid information from space,is key part to a star tracker system.However,the stary light is usually a problem of this part which will decrease the accuray of star detecion unit.Meanwhile,a FPGA or a SoC CPU with limited is usually adopted by the inforamtion processing unit.How to design an efficient and stable FPGA based star centroid detecion become more and more import.A star tracker based centroid detecion algorithm specific to the FPGA,whose main frequent and Block RAM is 25 MHz and 4Mbit,is proposed in this paper.Firstly,according to the character and constrain of the hareware platform,we anaylse the current main star detection algorithm and destray light algorithm for if they can be implemented on the hardware platform and propose the connected domain based centoid detection algorithm and dynamic threshold destray light algorithm.The connected domain based centroid detection algorithm processes stars by pixel and label around it by order which pixels flow in.The dynamic threshold destray light algorithm maintains two groups of dynamic thresholds and chooses the better threshold for the current pixel.After that,parallelization and stream processing architecture are introduced to the hardware RTL imlementation.Although the parallelization speeds up the detection,it also introduces the star relabel problem.In order to solve this problem,we add the star merge step in the general algorithm structure and hardware implement.The hardware implementation is tested in RTL level to verify the consistency to algorithm.Finally,based on the inner environment of star tracker FPGA,an architecture for data transport between the star centroid detection unit and other parts of FPGA is designed and implemented by us to integrate the star tracker centroid detection platform.and a light valve star simulator(LVSS)is adopted to accomplish the integrate test.The highest throughput of our hardware unit is 6.62Gbit/s on Spartan6 FPGA platform,which means it takes only 7ms to process a 4M grey scale image with 12 bit depth.With the 25 MHz main clock frequency,this hardware units integrated on the star tracker platform can proceess image in real time with24 fps speed.
Keywords/Search Tags:centroid detection algorithm, star tracker, FPGA
PDF Full Text Request
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