ASIC Design Based On SVPWM Algorithm Of Six-phase Permanent Magnet Synchronous Motor

In recent years,due to the advantages of low-voltage high-power output and small pulsating component,the six-phase motor has been applied more and more widely in various fields,especially in the hybrid electric vehicle industry.As the main driving force of automobile,the control performance of motor drive system directly affects the performance of automobile.In this paper,Space Vector Pulse Width Modulation(SVPWM)algorithm model of the six-phase permanent magnet synchronous motor is established and verified by taking the six-phase permanent magnet synchronous motor as the research object.Then,the algorithm model is digitized,and finally the ASIC design of SVPWM algorithm for the six-phase motor is completed.Firstly,for the complex mathematical model of the six-phase motor,the space voltage vector is decomposed into three mutually perpendicular subspace planes ?-?3 z1-z2 and x-y according to the coordinate transformation principle.Because the traditional SVPWM algorithm does not control the z1-z2 subspace voltage vector,and the output contains large harmonic component.In this paper,the maximum four-vector synthesis technique is used to select the adjacent maximum four-vector and zero-vector synthesis target voltage vector in the ?-? plane,so that the projected amplitude in the z-z2 plane is zero,with smaller output harmonics and lower stator copper loss.In addition,the iPark transform in the traditional SVPWM algorithm is abandoned,and the Cordic algorithm is introduced to implement the trigonometric function and square root calculation in the SVPWM algorithm,which is convenient for hardware implementation.Secondly,the algorithm model is built and simulated based on Matlab/Simulink platform.After verification,the circuit design of the six-phase SVPWM algorithm model is carried out.The whole algorithm includes Cordic algorithm,sector judgment,vector action time calculation and PWM wave generation of four sub-modules.In the vector action time calculation module,the input signal size is restricted by the range of the modulation coefficient to ensure that the output is not adjusted;The PWM signal with adjustable design period is convenient for motor debugging in different applications.In the PWM signal generation module,a dead zone control circuit is added to prevent the short circuit problem caused by the direct connection of the upper and lower arms of the same phase in the inverter bridge.Finally,the circuit of each submodule is simulated and verified by using Modelsim,and the error of the basic vector time calculation module is analyzed by using Matlab,with an error of less than 3%.After the design is completed,the FPGA prototype of the entire algorithm module is verified,and the measured PWM wave frequency is consistent with the theoretical value under different modes,and the dead zone control time of 2 seconds is consistent with the value of program design.Finally,based on a foundry's 40nm CMOS process,Cadence's EDA tools are used for logic synthesis and layout design,the designed ASIC layout area is 157×155?m2.