Analysis And Design Verification Of Switching Loss And Noise Of High Performance Motor Driver

As the core equipment for manufacturing large-scale integrated circuits,lithography machines are moving towards higher graphics transfer resolution and larger silicon wafer sizes,higher yields and yields,which require high speed,high precision and large strokes for the workpiece table,Correspondingly put forward the extreme requirements for its acceleration and positioning accuracy.In order to drive the lithography machine workpiece stage to achieve ultra-precision motion control under the action of the output current of the motor driver,the motor driver must have the ability to respond quickly to higher-frequency bandwidth currents and signal-to-noise ratio performance such as extremely low current noise.The former requires a higher driver supply voltage,while the latter requires suppression of various power disturbances and electrical impulse noise.In this paper,the traditional PWM driver is improved and researched on the output current ripple increased by high voltage,the pulse interference signal and glitch noise brought by high frequency,and the switching heat loss under the combined action of high voltage and high frequency.For the purpose of improving driver frequency bandwidth,reducing output current noise,and reducing power consumption,the design of gate drive circuit,power conversion circuit and glitch absorption circuit is completed through theoretical derivation and pspice simulation analysis,which improves the dynamic response speed of the driver,Improved thermal power consumption,output current ripple and glitch noise.In response to the problem of excessive thermal power consumption and safety caused by the high frequency and high voltage,a gate drive circuit is designed to improve the dynamic response and safety performance of the driver.Based on the analysis of the influence mechanism of parasitic parameters on the dynamic process,power consumption,and safety of the drain-source switch during high-power output of high-frequency switches,the miller platform that exists in the high-frequency working environment of MOSFET is effectively avoided by optimizing circuit parameters and mis-conduction problem,reduce the thermal power consumption of the parasitic capacitance charge and discharge during the drain-source switching process,improve the current mutation glitch noise generated by the gate parasitic inductance during the high-frequency switching process.By analyzing the safe operating area of the MOSFET and calculating the drain-source current change rate di_ds/dt,the power device is ensured to work within a safe range.Using pspice simulation to verify the feasibility of the circuit,the drain-source switching time is reduced to 1/7,and the output waveform is stable and the glitch noise is small.Aiming at the problem of ripple noise caused by high voltage and pulse interference noise caused by high frequency,a power conversion circuit and a glitch absorption circuit are designed to effectively improve the output current accuracy of the driver.With the constraints of high switching frequency,maximum output current,and maximum overshoot voltage required by the driver design,a new LCR filter circuit was designed to improve the output current ripple noise in response to the deterioration of high-voltage ripple noise.The ripple was optimized by optimizing the circuit parameters.The noise is reduced to 1/4 of the original.In order to solve the problem of excessive output current noise di_load/dt caused by the high frequency switch to the main circuit distributed inductance,the more mature engineering RC and RCD snubber circuits are used.In this paper,the circuit parameters are optimized to reduce the load current noise to the original1/20.Based on the above analysis and design,a hardware experiment platform was constructed,and the experiment results verified the safety and feasibility of the drive circuit design.