Reliability Design For CMOS Memristor Hybrid Circuits

Memristors can "remember" the amount of current that has passed through it with the advantage of small feature size,low power consumption,high scalability,etc.CMOS circuits have the advantages of high reliability and high controllablity.Combined with each other's advantages,CMOS-memristor hybrid circuits can realize more complex applications and has significant application potential in storage,logic operation,field programmable gate array(FPGA)and neural network.Currently,the fabrication process of memristors is in low reliability.Thus,the reliability design of CMOS-memristor hybrid circuits becomes a research hotspot.There are a lot of works in the reliability of memristors.By analyzing the oxygen vacancies in memristor based on a particles-migrating model,some researchers found the physical causes for wear-out failures as well as their repairable characteristics.Current researches have shown that an appropriate operating voltage can significantly improve the reliability of memristor-based circuits.This thesis focuses on the system-level reliability of hybrid CMOS-memristor circuits,mainly the reliability problems of memristors.We propose two self-repair reliability designs for two kinds of hybrid CMOS-memristor circuits:Resistive random access memory(RRAM)and Memristor Ratioed Logic(MRL)circuits,respectively.For RRAM,this thesis proposes a self-repair reliability architecture where two modules,Error Correcting Code(ECC)module and self-repair module,are added.ECC module is capable of detecting and correcting errors in data blocks,and will inform the self-repair module after reaching a specific number of errors being detected.Self-repair module will control the failed data block in self-repair mode,where the repaired voltage will be automatically loaded to the failed RRAM cells.Simulation results show that compared with current system-level reliability design methods the proposed design can not only reduce the error rate of data blocks significantly,but also improve their life-time.For MRL circuits,this thesis analyses MRL gates and finds that over set failures do not exist.However,over reset failures are prone to appear in MRL logic circuits.This thesis proposes a periodic-repair reliability design scheme including fault detection,resistance adjustment,self-repair and redundant replacement modules.The proposed scheme will detect the resistances of memristors in logic circuits periodically.If the resistance of a memristor is out of a normal operating range,the resistance will be adjusted.If the adjustment is unsucessful,an over reset repair operation will be carried out.After that,a check process is performed.Finally,the irreparable logic block will be replaced by a redundant block.Simulation results show that the life-time of a logical block is lengthened obviously in our proposed design.