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Design Of FPGA Image Acquisition System Based On USB3.0 Interface

Posted on:2019-10-19Degree:MasterType:Thesis
Country:ChinaCandidate:C C ZhaoFull Text:PDF
GTID:2428330563499160Subject:Computer technology
Abstract/Summary:PDF Full Text Request
With the rapid development of integrated circuit technology driven by Moore's Law,the resolution of image sensors based on CMOS technology has been greatly improved,output image quality has become higher,and the amount of data has increased dramatically.Most of the interfaces of mature data acquisition systems are PCI,IEEE1394,PXI,USB2.0,etc.These interfaces gradually show the disadvantages of low transmission rate and poor portability,and gradually lose their versatility.An image data acquisition system based on USB3.0 interface is designed to realize the fast acquisition and transmission of large amount of data.In order to reduce the coupling among the modules in the system design,the TOP-DOWN design mode is used,and the modules are divided from the top level according to the function.In order to ensure the reliability of the design and reduce the redundancy of the code,the functional module is designed to make use of the IP core as much as possible.According to the features of the module,different design ideas are used.The on-chip system is applied to the image sensor configuration;the ping-pong operation is used on the storage;the finite state machine is involved in the transmission.In order to improve the traditional image sensor configuration,using C++ and Verilog HDL mixed programming ideas,not only enhances the design ability but also enhances the on-line debugging ability of the system.In order to change the operation mode of DDR2 memory,the controller is further packaged to simplify the number of interfaces and reduce the difficulty of use.After the system design was completed,a loopback test was used to verify the reliability of the USB module,and flow mode testing was used to verify the validity of the USB interface.Then using FPGA to simulate the data source,verify the feasibility of the system FPGA and USB architecture.Finally,the data is collected by a CMOS camera,buffered by DDR2,and sent to the host computer through the USB3.0 interface for actual transmission testing and image display.
Keywords/Search Tags:image sensor, FPGA, USB3.0, firmware
PDF Full Text Request
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