Research And Implementation Of New Digital Channelization Processor Based On DFT-S-OFDM

With the continuous development of wireless communication,Orthogonal Frequency Division Multiplexing(OFDM)and its derivative technologies have been widely used due to their higher spectral efficiency and superior bandwidth scalability.The subchannel division mechanism based on discrete Fourier transform of this technology can be extended to the field of dedicated communication.It can achieve frequency hopping and spread spectrum through flexible subcarrier mapping.Author of this thesis creatively proposes a digital channelization processor structure with reference to the core idea of DFT-S-OFDM,and provides a design and implementation method on the software radio platform.This thesis mainly contains the following parts:The basic theory and key technologies in digital channelization are first studied.The author deeply analyzes the characteristics of the multi-rate signal processing reflected on the spectrum.It also explains the basic principles and transmission characteristics of OFDM and DFT-S-OFDM as well as the implementation mechanism of channelization processing and the role of cyclic prefix.The principle of sliding correlation synchronization based on CAZAC sequence is also introduced.Secondly,this thesis presents the overall design of the digital channelization processor,including overall structure planning,the design of the transmit and receive links,the design of the frame format,the development of the resource mapping scheme and the transmission interface design of external devices.Thirdly,the author details the implementation of the digital channelization processor in FPGA,including the FFT/IFFT module,the resource mapping/demapping module,the external interface module,and the construction of the entire transceiver link.In addition,it also provides the resource consumption evaluation results of the core part of the system,and verifies the correctness of the function through logic simulation and hardware test.Lastly,the implementation of system frame synchronization and frequency offset correction is discussed.The author introduces the sliding correlation frame synchronization implementation structure based on CAZAC sequence.It also proposes a frequency offset correction method based on multi-way preset frequency offset and a frequency offset estimation scheme based on phase rotation statistics.The feasibility and various parameters of the scheme were determined through simulation experiments.