Synchronous Design And FPGA Implementation Of A GSM Monitoring System

With the rapid development of communication,it is closely related to people's lives.But the communication security problems that come with it cannot be ignored.Therefore,the monitoring system based on GSM network plays an important role in the field of communication security.For the GSM monitoring system,the completion of synchronization is the primary and critical step of the baseband signal processing.Only the successful synchronization can complete the subsequent demodulation and decoding process,so that the GSM monitoring system can successfully realize the monitoring of the speech signal.This paper is aimed at the traditional GSM monitoring system based on DSP platform,the problem of too few listening channels.A synchronization scheme for multi-channel GSM monitoring system suitable for FPGA platform is designed.Firstly,the synchronization algorithm of GSM system is comprehensively studied and analyzed.The simulation and performance comparison of FFT method,envelope detection method,phase difference method and matching correlation method in coarse synchronization are carried out,and the advantages and disadvantages are analyzed.The static AD data with FB burst sequence is symbolized and then subjected to frequency domain autocorrelation operation.The simulation results show that this method has better anti-noise performance than the direct FFT method.Then the overall design flow of the GSM monitoring system is studied.Based on the frame synchronization algorithm,the FPGA synchronization part module is designed.The sub-module includes a clock module,an FCCH coarse synchronization module,a derotation module,a SCH fine synchronization module,and a TCH synchronous transmission.The sub-module was simulated by ModelSim,and the correctness of the module design was verified on the Xilinx XC7K325 T development board.Among them,the FCCH coarse synchronization module and the SCH fine synchronization module are optimized in structure design,which saves resources and reduces delay.The TCH synchronous transmission sub-module is designed by time division multiplexing,so that the single FPGA development board can monitor 32 channels of voice signals.Finally,in order to verify the correctness of the synchronization part module running in the entire GSM monitoring system,each sub-module is connected with the rest of the monitoring system.Through the test of the actual environment,the monitoring system can stably monitor multiple voice signals.The synchronization part of the GSM monitoring system designed in this paper is correct and effective.