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Research On Convolutional Neural Network Acceleration Framework For Cloud-based FPGAs

Posted on:2020-08-16Degree:MasterType:Thesis
Country:ChinaCandidate:Y YuFull Text:PDF
GTID:2428330596995491Subject:Software engineering
Abstract/Summary:PDF Full Text Request
In recent years,the development of deep neural networks has greatly improved the quality of image and video analysis in academia and industry.Among them,convolutional neural network is a representative method in the field of image processing,and its effectiveness has been proved in various machine learning applications.The growth of network parameters and intermediate results brought about by the expansion of the overall scale of convolutional neural networks has challenged the demand for hardware resources,and limited the real-time and low-power applications of convolutional neural networks to a certain extent,while the data flow patterns of the convolutional neural networks algorithms make them ideal for hardware acceleration.In view of the above-mentioned convolutional neural network compute-intensive and software implementations are not suitable for real-time and low-power application scenarios,using cloud based FPGAs provides an excellent solution for fast and energy-efficient convolutional neural network inference.FPGAs are expected to play an important role in high-performance and lowpower computing of convolutional neural networks for mobile(such as drones or autonomous vehicles)and cloud computing arena.However,implementing an effective and efficient convolutional neural network system on FPGAs is challenging.In response to these problems,this paper proposes a convolutional neural network acceleration framework for cloud-based FPGAs.Through the design of accelerator core and network function layer template,the synthesizable template function l ibrary based on high-level synthesis technology is realized.The generation architecture of convolutional neural network acceleration framework is analyzed from three aspects: hardware and software partitioning,system architecture and acceleration framework generation flow.The mapping relationship between the network task model and the software and hardware platform,the task is reasonably assigned to the processor and the cloud FPGA,the task-resource scheduling model is constructed,and the scheduling optimization scheme is designed from the data flow and the control flow.This paper implements the mapping of the network model to the cloud FPGA and the reasonable scheduling of the hardware and software task resources.In the experimental evaluation part,the typical convolutional neural network model is selected as the experimental object to evaluate the system performance generated by the acceleration framework,and then compared with the software version and other FPGA implementations in the existing research.Compared with the CPU implementation,it exhibits better performance and energy performance.Compared with the GPU implementation,although the performance is worse,the energy efficiency is higher.And it has better power efficiency potential while achieving comparable performance to existing research work.The experimental results show that the proposed acceleration framework can meet the emerging computing and energy efficiency requirements,and can significantly improve the overall design efficiency of the neural network on the FPGAs.Compared to other cloud-based platforms such as GPUs or TPUs,the design of this paper provides an alternative solution while providing flexibility,low power consumption and high performance.Other features are also provided,such as supporting quantized network models and balancing the use of on-chip resources.
Keywords/Search Tags:Convolutional Neural Network, Field Programmable Gate Array, High-Level Synthesis, Acceleration Framework, Scheduling
PDF Full Text Request
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