Analyses Of Novel UMOS With High-K Dielectric And Majority Carrier Accumulation

Vertical power Metal Oxide Semiconductor（MOS）device is an important power semiconductor device.It has a very wide range of applications in consumer electronics and industrial control.The specific on-resistance and breakdown voltage are the most important characteristics of the vertical power MOS device,but there is a contradictory between the optimization of the specific on-resistance and the breakdown voltage,which is also called the silicon limit.How to effectively reduce the specific on-resistance and improve breakdown voltage of vertical power MOS has attracted the attention of many researchers,and has become a research hotspot.The super junction（SJ）technology has introduced the lateral electric field in the drift region through the composite buffer layer,breaking the silicon limit,and has established a new relationship between breakdown voltage and specific on-resistance,also known as super junction limit.In order to further optimize the breakdown voltage and specific on-resistance of vertical power MOS and break the super junction limit,two new vertical power MOS devices are proposed:（1）On the basis of conventional SJ trench MOS（UMOS）and combined with carrier accumulation effect of oxide semiconductor structure,a UMOS with majority carrier accumulation is proposed,which is called MCA-UMOS.Compared with conventional SJ-UMOS,MCA-UMOS added a layer of SiO₂ between P pillar and N pillar and added a thin N region in P pillar.In on-state,the potential difference on the oxide layer will form the majority carrier accumulation on the sidewall of the drift region,which will greatly increase the current and reduce the specific on-resistance.During off-state,the P pillar and N pillar can be mutually depleted,and the oxide layer can withstand voltage to modulate the electric field,thus increasing the breakdown voltage.The simulation results show that when the length of the drift region is 40μm and the width of P pillar is 5μm,compared with the conventional SJ-UMOS,the specific on-resistance of MCA-UMOS decreases from 12 mΩ·cm² to 3.05 mΩ·cm² and reduces 75%.At the same time,the breakdown voltage increased from 618.4V to 649V,increasing by nearly 5%.In addition,the influence of the structural parameters of MCA-UMOS on breakdown voltage and specific on-resistance is also analyzed,and the technology of MCA-UMOS is also discussed.（2）On the basis of conventional MCA-UMOS and combined with high permittivity materials,a majority carrier accumulative UMOS with high K dielectric is proposed,which is called HK MCA-UMOS.The use of high K material instead of SiO₂ layer can make more carriers accumulate on the sidewall of the drift region when the on-state,further improving the current of the device and reducing the specific on-resistance.At the same time,in off-state,high K material can withstand higher voltage and increase breakdown voltage.The simulation results show that when the length of drift region is 40μm,the width of P pillar is 5μm,the dielectric layer width is 0.1μm,the permittivity is 50,compared with conventional MCA-UMOS,the specific on-resistance of HK MCA-UMOS is reduced from 3.05 mΩ·cm² to 0.5 mΩ·cm² and reduces 84%,while the breakdown voltage is increased from 649V to 685V,which is 5.5%higher than that of conventional MCA-UMOS.In addition,the effects of width,length and permittivity of high K dielectric layer on the breakdown voltage and specific on-resistance of HK MCA-UMOS are analyzed,and the technology of high K materials is discussed.