Research On IP Core Of FPGA Control Module For Small PLC

Project based on ARM chip LPC1788 and FPGA chip A3PE1000 as the core controller developed small PLC system,this paper on the basis of this,to determine the application of STM32F407IGT6 and EP4CE10F17C8 N as the core controller,the software platform and hardware circuit of the original PLC system to carry out the optimization design.This paper mainly studies the small PLC system using ARM and FPGA as the processor,analyzes the working principle of PLC and the hardware structure and instruction system of PLC.PLC need to complete the implementation of the logic operation instructions,timing counting function,input data acquisition and output data refresh function.In this paper,the application of FPGA design,ARM interface circuit and FPGA data acquisition module,digital input output data refresh digital circuit module,logic controller,conversion instruction format and ARM instruction of each function module to the FPGA directive,the following results were obtained:(1)The interface circuit of ARM and FPGA is designed to realize the direct communication between FPGA and ARM,and the address allocation and region division of the dual port RAM memory area are carried out.The dual port RAM based on ARM-FPGA data storage experiment has been,analysis to the FPGA instruction format of ARM transmission,and receive the FPGA results of the implementation of the data format and features,developed between the controller and the ARM communication module of FPGA encoding format.(2)According to the FPGA of each function module has been designed for the instruction format,analysis of PLC operation and editing,and ARM sequential execution of instructions sequence,FPGA parallel execution characteristics,according to the ARM sent to the FPGA instruction format,how to optimize the design of FPGA receiving and processing ARM command for each FPGA function module instruction the format,timing and specification of the various functional modules of the FPGA read and write instructions.(3)According to the characteristics of FPGA parallel processing,the design and implementation of the multi bit logic controller based on FPGA is presented.The coding format of the logic operation instruction is optimized,and the operation of the multi operation bit logic control module is completed.(4)The input circuit module of the small PLC is designed,which includes the external PLC input conditioning circuit of PLC and the input data acquisition digital circuit realized by FPGA.The output refresh module of PLC is designed,which includes the output driver circuit of PLC and the digital circuit of output data refresh by FPGA.The input module and the output module are completed.(5)Developed a testing scheme,completed the function simulation and timing simulation software,through the layout and pin assignment,compile the simulation right verilog HDL download to the Altera company's Cyclone IV series EP4CE10F17C8 N chip board level test,verify the feasibility of the circuit design.