Reasarch And Design Of UVM-based AXI4-Stream Verification IP

The workload of verification is gradually increasing with the complexity of the chip itself,improving the verification efficiency has become an significant direction of research.Traditional verification methodologies lack reusability and takes long time during verification,cannot meet the time to market requirements.Therefore,it has gradually been replaced by a new verification methodologies named UVM,which has become the mainstream of verification methodology.On analyzed the characteristics of the AXI4-Stream protocol in detail,targeting at the problems of poor reusability,low coverage,and low automation of traditional verification platforms,a universal AXI4-Stream single master-single slave verification platform was designed by using UVM verification methodologies.Based on this verification platform,interconnect structure is designed,the routing problem between multiple masters and multiple slaves is solved since a multi-master-multi-slave verification platform is constructed.Fixed priority arbitration and polling arbitration are designed,which solves the problem of competition when transmitting data between multiple masters and multiple slaves,and ensures normal information exchange between multiple masters and multiple slaves.Constrainted random test,base test and direct test are designed to verify the designed verification platform.A functional coverage model is used to automatically count the functional coverage.Experiment results show that the verification platform has a functional coverage of 100%,which can be used to verify the So C system with AXI4-Stream interface,strong configurability and reusability of the verification IP could significantly improve verification efficiency.