Research And Realization Of Verification About AXI4 Bus Protocol Interface IP Based On UVM

With the improvement of the verification in IC and SoC industry,the technology of verification has been developed since the language of System Verilog and the verification methodology specially the Universal Verification Methodology(UVM)are proposed,which provide a new way to solve the dilemma of verification.A verification platform based on UVM is proposed in this paper,which combined with the technology of assertion,coverage statistics.The platform complete the verification of the intellectual property(IP)core based on Advanced eXtensible Interface 4(AXI4)with the verification of constrained random excitation.At first,the thesis makes a thorough study on the current technology of verification including the language and the methodology of verification and find the problems about verification faced.Then,the thesis turn to make deeply study on the verification platform based on UVM and eventually build a verification platform according to the specification of UVM.A typical and layered architecture of UVM is adopted in this platform.By using the the class in UVM library,the universal verification components(UVC)can be inherited and designed for the AXI4 IP core so as to build the UVM tree,which eventually constitute the whole platform.The platform customized according to the AXI4 protocol possess a certain degree of portability and reusability.In addition,two module of Design Under Test(DUT)are involved in the design,one of which is a IP core on RAM based on AXI4 protocol generated by the company of XILINX while the other one is a IP core on slave interface based on AXI4protocol(AXI4 SI)designed independently in the laboratory.The System Verilog language is used to complete the design of the whole verification platform while the Verilog Hardware Description Language(HDL)is used to complete the IP core of DUT.Modelsim is used to run the verification platform,which complete the verification of AXI4 RAM including the verification on constrained random excitation based on the burst transmission of AXI4 protocol,automatic comparison,verification of assertion,coverage statistics.A verification report is given as a summary of the verification on the UVM verification platform.Then,a scheme of the platform reuse from AXI4 RAM to AXI SI is proposed after the deeply studying on the reusability of UVM platform.The experimental result shows that AXI4 RAM pass the verification cognizance by the UVM platform platform with theassertion all hits and the functional coverage 100%.Meanwhile,the UVM verification platform has a certain practicality,and can be used to verify other AXI4 protocol DUT.